JPS5532183A - Information process apparatus - Google Patents

Abstract

PURPOSE: To connect the auxiliary memory device capable of performing the writing and the performance of the program by the use of the same address, enable CPU to be operated by the high speed command and make the high speed program and an effective connection of the memory device possible.

CONSTITUTION: During the performance of the program from main memory device connected to the external common bus 7, 8, in the main memory device, input of the command 11 is carried out to do the command 11 while the command for changing over the command 12 to the auxiliary memory device 22 is read out and given to the memory control device 24 through the line 8 from the operation process device 21. In accordance with the control signal from the device 24, the operation of the external bus control circuit 23 is stopped, the memory contents of the device 22 is put out to the internal data bus 25, and the device 21 starts to read the command 13 from the device 22 and performs. In the next place, if the command 14 is one which uses the data in the main memory device connected to the external common bus 7, 8, this command is given to the device 24 to operate the circuit 23 unitl the data used for the command is read and prevent output from the device 22.

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