JPS5533224A - Sorting function integrated-circuit device - Google Patents

Sorting function integrated-circuit device

Info

Publication number
JPS5533224A
JPS5533224A JP10577578A JP10577578A JPS5533224A JP S5533224 A JPS5533224 A JP S5533224A JP 10577578 A JP10577578 A JP 10577578A JP 10577578 A JP10577578 A JP 10577578A JP S5533224 A JPS5533224 A JP S5533224A
Authority
JP
Japan
Prior art keywords
input
memory unit
signals
memory
units
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10577578A
Other languages
Japanese (ja)
Inventor
Toshiaki Chiba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP10577578A priority Critical patent/JPS5533224A/en
Publication of JPS5533224A publication Critical patent/JPS5533224A/en
Pending legal-status Critical Current

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  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE: To reduce external input-output terminals in number in making a sorting network into an integrated circuit, by providing memory units which has elements stored with input and output signals respectively.
CONSTITUTION: Denoting the number of digital signals to be processed by N, N- input sorting network 11, memory units 12 and 13 capable of storing the N-number digital signals, and units 14 and 15 making selective connections between external input and output terminals and the needed parts of memory units are integrated into one semiconductor integrated circuit. A group of input signals are inputted in time series from external input terminal 16 and sequentially stored in the element of memory unit 12 selected by selective connection unit 14, so that the group of input signals to sorting network 11 will stand by in memory unit 12. After being sorted, they are written to memory unit 13 and supplying an adequate control signal to selective connection unit 14 outputs the contents of the memory unit to external output terminal 17.
COPYRIGHT: (C)1980,JPO&Japio
JP10577578A 1978-08-30 1978-08-30 Sorting function integrated-circuit device Pending JPS5533224A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10577578A JPS5533224A (en) 1978-08-30 1978-08-30 Sorting function integrated-circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10577578A JPS5533224A (en) 1978-08-30 1978-08-30 Sorting function integrated-circuit device

Publications (1)

Publication Number Publication Date
JPS5533224A true JPS5533224A (en) 1980-03-08

Family

ID=14416524

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10577578A Pending JPS5533224A (en) 1978-08-30 1978-08-30 Sorting function integrated-circuit device

Country Status (1)

Country Link
JP (1) JPS5533224A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6426223A (en) * 1987-07-22 1989-01-27 Canon Kk Sequential array circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6426223A (en) * 1987-07-22 1989-01-27 Canon Kk Sequential array circuit

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