JPS5533286A - Data processor - Google Patents

Data processor

Info

Publication number
JPS5533286A
JPS5533286A JP10650378A JP10650378A JPS5533286A JP S5533286 A JPS5533286 A JP S5533286A JP 10650378 A JP10650378 A JP 10650378A JP 10650378 A JP10650378 A JP 10650378A JP S5533286 A JPS5533286 A JP S5533286A
Authority
JP
Japan
Prior art keywords
subroutine
initial
linkage
address
point group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10650378A
Other languages
Japanese (ja)
Inventor
Makoto Yokoyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10650378A priority Critical patent/JPS5533286A/en
Publication of JPS5533286A publication Critical patent/JPS5533286A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To quicken access to a subroutine by using a coordinate table between the initial point address of the subroutine and subroutine function discrimination code.
CONSTITUTION: A main program forms a loop and before the loop starts, the overwrite operation of linkage tape 9 is done. Namely, subroutine function discrimination code ID of general-purpose register 7 is compared with codes ID1 to IDm in coordinate table 3 and when IDi agrees with it, initial-point group table address ETAi is set to memory 5 and initial-point group table addresses EAi-1 to EAi-x are stored in linkage table 3. An instruction of subroutine CALL is fetched and then, EAi-1 to EAi-x are read out from linkage table 9 and then set to a memory address register, thereby executing the subroutine.
COPYRIGHT: (C)1980,JPO&Japio
JP10650378A 1978-08-31 1978-08-31 Data processor Pending JPS5533286A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10650378A JPS5533286A (en) 1978-08-31 1978-08-31 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10650378A JPS5533286A (en) 1978-08-31 1978-08-31 Data processor

Publications (1)

Publication Number Publication Date
JPS5533286A true JPS5533286A (en) 1980-03-08

Family

ID=14435226

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10650378A Pending JPS5533286A (en) 1978-08-31 1978-08-31 Data processor

Country Status (1)

Country Link
JP (1) JPS5533286A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6010338A (en) * 1983-06-29 1985-01-19 Fujitsu Ltd Method for executing program module
JPS61239354A (en) * 1985-04-16 1986-10-24 Fujitsu Ltd Inter-processor communication system
JPS62264388A (en) * 1986-01-21 1987-11-17 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Apparatus for controlling conversion, clipping and mapping of graphic display system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6010338A (en) * 1983-06-29 1985-01-19 Fujitsu Ltd Method for executing program module
JPS61239354A (en) * 1985-04-16 1986-10-24 Fujitsu Ltd Inter-processor communication system
JPS62264388A (en) * 1986-01-21 1987-11-17 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Apparatus for controlling conversion, clipping and mapping of graphic display system

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