JPS5533304A - Circuit scan system - Google Patents

Circuit scan system

Info

Publication number
JPS5533304A
JPS5533304A JP10481878A JP10481878A JPS5533304A JP S5533304 A JPS5533304 A JP S5533304A JP 10481878 A JP10481878 A JP 10481878A JP 10481878 A JP10481878 A JP 10481878A JP S5533304 A JPS5533304 A JP S5533304A
Authority
JP
Japan
Prior art keywords
circuit
signal
case
process request
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10481878A
Other languages
Japanese (ja)
Inventor
Yasuo Doi
Takashi Nakamura
Yoshihisa Ogawa
Toshiyuki Odakawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10481878A priority Critical patent/JPS5533304A/en
Publication of JPS5533304A publication Critical patent/JPS5533304A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/22—Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To secure a circuit scan system which is highly efficient and in accordance with the system by transmitting the scan signals is sequence to the next circuit correspondence parts in case no process request is given. CONSTITUTION:Circuit common control part 1 transmits scan signal A from circuit correspondence parts 2a-2n at the process request acceptable time and in fixed cycle. Part 2a, for example, which received signal A transmits signal A directly to the next circuit correspondence part via gate B in case the FFC memorizing the presence or absence of the process request is off, and stops the transmission of signal A in case the FFC is on to transmit the circuit number to transmission circuit 5a via bus line D connecting all circuit correspondence parts in the wired off-logic. At the same time, control part 1 decides the absence or presence of the flyback line of signal A after transmission of signal A and after a fixed time decided by the total delay time of gate B and wiring lengths, and then decides that the process request is not held at all parts 2a-2n in case flyback line A exists. While the fact that the process request is given from the circuit of line D in case no line A exists.
JP10481878A 1978-08-30 1978-08-30 Circuit scan system Pending JPS5533304A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10481878A JPS5533304A (en) 1978-08-30 1978-08-30 Circuit scan system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10481878A JPS5533304A (en) 1978-08-30 1978-08-30 Circuit scan system

Publications (1)

Publication Number Publication Date
JPS5533304A true JPS5533304A (en) 1980-03-08

Family

ID=14390974

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10481878A Pending JPS5533304A (en) 1978-08-30 1978-08-30 Circuit scan system

Country Status (1)

Country Link
JP (1) JPS5533304A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4980943A (en) * 1972-12-11 1974-08-05

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4980943A (en) * 1972-12-11 1974-08-05

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