JPS5534338A - Key memory control system - Google Patents

Key memory control system

Info

Publication number
JPS5534338A
JPS5534338A JP10650678A JP10650678A JPS5534338A JP S5534338 A JPS5534338 A JP S5534338A JP 10650678 A JP10650678 A JP 10650678A JP 10650678 A JP10650678 A JP 10650678A JP S5534338 A JPS5534338 A JP S5534338A
Authority
JP
Japan
Prior art keywords
reference bit
fixed time
memory
access
management information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10650678A
Other languages
Japanese (ja)
Inventor
Saburo Kaneda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10650678A priority Critical patent/JPS5534338A/en
Publication of JPS5534338A publication Critical patent/JPS5534338A/en
Pending legal-status Critical Current

Links

Landscapes

  • Storage Device Security (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE: To remove automatically the content of the reference bit without access after the passing of a fixed time by constructing the protion in which the reference bit is recorded by a memory element reset if the access is not carried out for a fixed time.
CONSTITUTION: The main memory 7 is divided into a plurality of page frames. The key memory portion is constructed by the management information memory portions 8A and 8B. The management information memory portion 8B is constituted by, for example, dynamic type MOS memory. The contents of the respective reference bit is not made access for a fixed time, it is automatically deleted. In this manner, it is not necessary for the central process device to emit the command for resetting the reference bit R, so that the overhead can be largely reduced.
COPYRIGHT: (C)1980,JPO&Japio
JP10650678A 1978-08-31 1978-08-31 Key memory control system Pending JPS5534338A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10650678A JPS5534338A (en) 1978-08-31 1978-08-31 Key memory control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10650678A JPS5534338A (en) 1978-08-31 1978-08-31 Key memory control system

Publications (1)

Publication Number Publication Date
JPS5534338A true JPS5534338A (en) 1980-03-10

Family

ID=14435304

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10650678A Pending JPS5534338A (en) 1978-08-31 1978-08-31 Key memory control system

Country Status (1)

Country Link
JP (1) JPS5534338A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60118948A (en) * 1983-11-30 1985-06-26 Fujitsu Ltd Storage key access system
JPS6451151U (en) * 1987-09-28 1989-03-29

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60118948A (en) * 1983-11-30 1985-06-26 Fujitsu Ltd Storage key access system
JPS6451151U (en) * 1987-09-28 1989-03-29

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