JPS5537604A - Common preliminary constituting method for buffer memory - Google Patents

Common preliminary constituting method for buffer memory

Info

Publication number
JPS5537604A
JPS5537604A JP10849978A JP10849978A JPS5537604A JP S5537604 A JPS5537604 A JP S5537604A JP 10849978 A JP10849978 A JP 10849978A JP 10849978 A JP10849978 A JP 10849978A JP S5537604 A JPS5537604 A JP S5537604A
Authority
JP
Japan
Prior art keywords
circuit
memory
common
stand
full
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10849978A
Other languages
Japanese (ja)
Inventor
Kanko Yuki
Kenichi Hanabe
Toshio Suhara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP10849978A priority Critical patent/JPS5537604A/en
Publication of JPS5537604A publication Critical patent/JPS5537604A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To reduce a buffer memory per circuit while increasing circuits per channel in number, by providing a common stand-by buffer memory between a redundancy suppression code circuit and file memory.
CONSTITUTION: Between redundancy suppression code circuit 1 and file memory 7, (l)-sheet common stand-by memory 8 corresponding to no circuit is provided which is connected to buffer memories 21W2n of (n)-circuit-multiple common memory constitution with the (m)-number sheets of memory for each circuit. As a result, if the (m)-number sheets of memory of a certain circuit are full of signals, buffer memory control circuit 3 switches stand-by memory change-over switch 10 to store signals in memory 8. On detecting memory 8 being full of signals, common stand-by memory control circuit 9 sends an output request to common control circuit 4. Circuit 4 exercises a supervision over what circuit is using memory circuit 8 and releases change-over switch 10n of a full in-use circuit. Therefore, even if a circuit low redundancy exists, this circuit can be prevented from overflowing to a certain degree.
COPYRIGHT: (C)1980,JPO&Japio
JP10849978A 1978-09-06 1978-09-06 Common preliminary constituting method for buffer memory Pending JPS5537604A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10849978A JPS5537604A (en) 1978-09-06 1978-09-06 Common preliminary constituting method for buffer memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10849978A JPS5537604A (en) 1978-09-06 1978-09-06 Common preliminary constituting method for buffer memory

Publications (1)

Publication Number Publication Date
JPS5537604A true JPS5537604A (en) 1980-03-15

Family

ID=14486318

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10849978A Pending JPS5537604A (en) 1978-09-06 1978-09-06 Common preliminary constituting method for buffer memory

Country Status (1)

Country Link
JP (1) JPS5537604A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01200444A (en) * 1988-02-05 1989-08-11 Nec Corp Control system for inter-file transfer of data

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01200444A (en) * 1988-02-05 1989-08-11 Nec Corp Control system for inter-file transfer of data

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