JPS5541079A - Code conversion unit - Google Patents

Code conversion unit

Info

Publication number
JPS5541079A
JPS5541079A JP11535678A JP11535678A JPS5541079A JP S5541079 A JPS5541079 A JP S5541079A JP 11535678 A JP11535678 A JP 11535678A JP 11535678 A JP11535678 A JP 11535678A JP S5541079 A JPS5541079 A JP S5541079A
Authority
JP
Japan
Prior art keywords
signal
length code
fed
conversion means
selector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11535678A
Other languages
Japanese (ja)
Other versions
JPS6217417B2 (en
Inventor
Akira Hirano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11535678A priority Critical patent/JPS5541079A/en
Publication of JPS5541079A publication Critical patent/JPS5541079A/en
Publication of JPS6217417B2 publication Critical patent/JPS6217417B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

PURPOSE:To increase the efficiency of coding by making unnecessary the insertion of special code showing the section between the unequal length code and the equal length code and simplifying the constitution of the coded converter. CONSTITUTION:The digital signal of N-bit is parallelly fed to the input terminal 1, it is converted into equal length code corresponding to the signal level with the first conversion means 2, and the second conversion means 3 converts the signal into unequal length code corresponding to the signal level of the input signal among 2N types of unequal length codes. The output of the both conversion means 2 and 3 is selected with the first selector 4 and fed to the buffer memory 5. Further, when the selector 4 selects the second conversion means 3, the discrimination circuit 6 discrimination whether the input signal is the level corresponding to the first unequal length code or not, the result of discrimination is fed to the control signal generator 7, the output of the generator 7 is fed to the selector 4 and the multiplexer 8 inputting the output of the memory 5, and the coded signal from the multiplexer 8 is outputted serially.
JP11535678A 1978-09-19 1978-09-19 Code conversion unit Granted JPS5541079A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11535678A JPS5541079A (en) 1978-09-19 1978-09-19 Code conversion unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11535678A JPS5541079A (en) 1978-09-19 1978-09-19 Code conversion unit

Publications (2)

Publication Number Publication Date
JPS5541079A true JPS5541079A (en) 1980-03-22
JPS6217417B2 JPS6217417B2 (en) 1987-04-17

Family

ID=14660493

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11535678A Granted JPS5541079A (en) 1978-09-19 1978-09-19 Code conversion unit

Country Status (1)

Country Link
JP (1) JPS5541079A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02100814U (en) * 1989-01-28 1990-08-10

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53105932A (en) * 1977-02-28 1978-09-14 Hitachi Ltd Variable length encoding system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53105932A (en) * 1977-02-28 1978-09-14 Hitachi Ltd Variable length encoding system

Also Published As

Publication number Publication date
JPS6217417B2 (en) 1987-04-17

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