JPS5541761A - Manufacturing semiconductor device - Google Patents

Manufacturing semiconductor device

Info

Publication number
JPS5541761A
JPS5541761A JP11534478A JP11534478A JPS5541761A JP S5541761 A JPS5541761 A JP S5541761A JP 11534478 A JP11534478 A JP 11534478A JP 11534478 A JP11534478 A JP 11534478A JP S5541761 A JPS5541761 A JP S5541761A
Authority
JP
Japan
Prior art keywords
frame
leads
devices
thereafter
supporting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11534478A
Other languages
Japanese (ja)
Other versions
JPS6123653B2 (en
Inventor
Katsuyoshi Miyairi
Yasuhiko Hori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11534478A priority Critical patent/JPS5541761A/en
Publication of JPS5541761A publication Critical patent/JPS5541761A/en
Publication of JPS6123653B2 publication Critical patent/JPS6123653B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE: To enhance mass productivity by installing a plurality of semiconductor devices on a lead frame, supporting the frame only by supporting leads, cutting the frame into individual devices, and conducting electrical characteristic tests.
CONSTITUTION: Semiconductor devices 2 are arranged on a plurality of openings provided on a lead frame 1, and the electrodes of the semiconductors and the leads of the frame 1 are connected. Thereafter, several pieces of leads 4 are remained and all other pieces of leads 3 are cut out. In this way, the devices 2 are held to the frame 1 by the leads 4, so that the measurements of the electrical characteristics of the individual devices are possible. Then, the frame 1 is cut into individual devices 6 which are supported by the frame 1 along chain lines 5. Defective devices which have been made in the previous processes are eliminated at this process. Then, only good devices are set on a carrier 7, the characteristic tests are conducted, thereafter the leads 4 are cut out.
COPYRIGHT: (C)1980,JPO&Japio
JP11534478A 1978-09-19 1978-09-19 Manufacturing semiconductor device Granted JPS5541761A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11534478A JPS5541761A (en) 1978-09-19 1978-09-19 Manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11534478A JPS5541761A (en) 1978-09-19 1978-09-19 Manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS5541761A true JPS5541761A (en) 1980-03-24
JPS6123653B2 JPS6123653B2 (en) 1986-06-06

Family

ID=14660205

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11534478A Granted JPS5541761A (en) 1978-09-19 1978-09-19 Manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPS5541761A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5944840A (en) * 1982-09-07 1984-03-13 Toshiba Corp Measuring apparatus of flat package
JPH0529427A (en) * 1991-07-24 1993-02-05 Nec Corp Method for manufacturing semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5944840A (en) * 1982-09-07 1984-03-13 Toshiba Corp Measuring apparatus of flat package
JPH0529427A (en) * 1991-07-24 1993-02-05 Nec Corp Method for manufacturing semiconductor device

Also Published As

Publication number Publication date
JPS6123653B2 (en) 1986-06-06

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