JPS5546665A - Error corrector - Google Patents
Error correctorInfo
- Publication number
- JPS5546665A JPS5546665A JP12051578A JP12051578A JPS5546665A JP S5546665 A JPS5546665 A JP S5546665A JP 12051578 A JP12051578 A JP 12051578A JP 12051578 A JP12051578 A JP 12051578A JP S5546665 A JPS5546665 A JP S5546665A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- data
- output
- error
- parallel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
Abstract
PURPOSE:To quicken an error correcting process by making error correction of one data to n-bit parallel. CONSTITUTION:Parallel data of n-bits is supplied to parallel divider circuit 24 and change-over switch 25 of coder 20; circuit 24 performs n-bit division processing according to generating polynomial G(x) and then outputs the residue of the division of data by G(x) at an input end of all bits of the data, and switch 25 switches at every fixed bits to output a coding output to transmission line 21. In decoder 22, on the other hand, input data is supplied to parallel divider circuit 29 through memory method 27 and gate 28 and the output of circuit 29 with the same function as circuit 24 is made to agree with an error bit pattern by multiplier circuit 30; when the error pattern is detected, gate 34 is opened to perform OR-ELSE processing with the output of method 27, thereby making error corrections.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12051578A JPS5546665A (en) | 1978-09-30 | 1978-09-30 | Error corrector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12051578A JPS5546665A (en) | 1978-09-30 | 1978-09-30 | Error corrector |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5546665A true JPS5546665A (en) | 1980-04-01 |
| JPS623619B2 JPS623619B2 (en) | 1987-01-26 |
Family
ID=14788125
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12051578A Granted JPS5546665A (en) | 1978-09-30 | 1978-09-30 | Error corrector |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5546665A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS617729A (en) * | 1984-04-27 | 1986-01-14 | ジ−メンス・アクチエンゲゼルシヤフト | Device for correcting error bursts in shortened cyclic block codes |
| JPS63274220A (en) * | 1987-05-01 | 1988-11-11 | Nec Corp | Single error correcting mechanism |
| JPH03222523A (en) * | 1990-01-29 | 1991-10-01 | Hitachi Ltd | Parallel error detection circuit |
-
1978
- 1978-09-30 JP JP12051578A patent/JPS5546665A/en active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS617729A (en) * | 1984-04-27 | 1986-01-14 | ジ−メンス・アクチエンゲゼルシヤフト | Device for correcting error bursts in shortened cyclic block codes |
| JPS63274220A (en) * | 1987-05-01 | 1988-11-11 | Nec Corp | Single error correcting mechanism |
| JPH03222523A (en) * | 1990-01-29 | 1991-10-01 | Hitachi Ltd | Parallel error detection circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS623619B2 (en) | 1987-01-26 |
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