JPS5549723A - Clock switching unit - Google Patents
Clock switching unitInfo
- Publication number
- JPS5549723A JPS5549723A JP12154078A JP12154078A JPS5549723A JP S5549723 A JPS5549723 A JP S5549723A JP 12154078 A JP12154078 A JP 12154078A JP 12154078 A JP12154078 A JP 12154078A JP S5549723 A JPS5549723 A JP S5549723A
- Authority
- JP
- Japan
- Prior art keywords
- clock
- gate
- output
- request
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To switch clocks without stopping a data processing unit by switching them at a time when the phase relation between the current clock and another clock becomes optimum.
CONSTITUTION: In case of the frequency of clock A higher than that of clock B, when a request to switch clock B to clock A or switch clock B to clock A is issued, the request is transferred to the data input of FF26 through OR gate 25, and AND between the output of FF26 and the inversion signal of OR gate 24 is operated by AND gate 28 when the output of OR gate 24 is "0", and timer 29 is triggered by this signal. The output of timer 29 becomes "1" and is broken to "0" after a fixed time. At this break time, the output of inverter 30 triggers FF31. In case that FF31 is set to "0", clock B is taken in by AND gate 34 and is outputted as clock C through OR gate 35. The power settlement signal of the processing unit can be used as the clock switching request.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12154078A JPS5549723A (en) | 1978-10-04 | 1978-10-04 | Clock switching unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12154078A JPS5549723A (en) | 1978-10-04 | 1978-10-04 | Clock switching unit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5549723A true JPS5549723A (en) | 1980-04-10 |
Family
ID=14813765
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12154078A Pending JPS5549723A (en) | 1978-10-04 | 1978-10-04 | Clock switching unit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5549723A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59164022U (en) * | 1983-04-18 | 1984-11-02 | 旭光学工業株式会社 | fiberscope imaging device |
| JPS59164023U (en) * | 1983-04-18 | 1984-11-02 | 旭光学工業株式会社 | fiberscope imaging device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51144539A (en) * | 1975-06-09 | 1976-12-11 | Toshiba Corp | Synchronized method of plural digital circuits |
| JPS5294048A (en) * | 1976-02-04 | 1977-08-08 | Hitachi Ltd | Clock switch control system |
-
1978
- 1978-10-04 JP JP12154078A patent/JPS5549723A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51144539A (en) * | 1975-06-09 | 1976-12-11 | Toshiba Corp | Synchronized method of plural digital circuits |
| JPS5294048A (en) * | 1976-02-04 | 1977-08-08 | Hitachi Ltd | Clock switch control system |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59164022U (en) * | 1983-04-18 | 1984-11-02 | 旭光学工業株式会社 | fiberscope imaging device |
| JPS59164023U (en) * | 1983-04-18 | 1984-11-02 | 旭光学工業株式会社 | fiberscope imaging device |
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