JPS5552256A - Semicondutor memory - Google Patents
Semicondutor memoryInfo
- Publication number
- JPS5552256A JPS5552256A JP12557378A JP12557378A JPS5552256A JP S5552256 A JPS5552256 A JP S5552256A JP 12557378 A JP12557378 A JP 12557378A JP 12557378 A JP12557378 A JP 12557378A JP S5552256 A JPS5552256 A JP S5552256A
- Authority
- JP
- Japan
- Prior art keywords
- type
- base
- bases
- transistors
- adjoining
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003071 parasitic effect Effects 0.000 abstract 3
- 230000000694 effects Effects 0.000 abstract 2
- 239000012535 impurity Substances 0.000 abstract 2
- 230000006378 damage Effects 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
- 238000000926 separation method Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
Landscapes
- Semiconductor Memories (AREA)
- Read Only Memory (AREA)
Abstract
PURPOSE:To restrict parasitic thyristor effect thereby securing memory by providing a high-impurity region whose conductive direction is the opposite to a base of P- ROM that is made by shortcircuiting due to a selective destruction of a base-emitter junction in a bipolar transistor. CONSTITUTION:Two or more P-type bases are formed in an N-type epitaxial layer 3 being provided on a P-type semiconductor substrate 1, then an N-type emitter is formed in each base to compose two or more NPN transistors which share the N- type layer 3 as a common collector. A P-type separation region 4 separates a transistor used for a peripheral circuit E1-B1-C1 from transistors used for memory elements. Then an N-type high-impurity channel stopper 5 is installed on the N-type collector between the adjoining two P-type bases B2, B3 of the transistors used for memory elements E2-B2-C1, E3-B3-C2. By so doing, current increase rate between the two adjoining bases in parasitic lateral transistors is reduced, thereby preventing the parasitic thyristor effect.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12557378A JPS5552256A (en) | 1978-10-11 | 1978-10-11 | Semicondutor memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12557378A JPS5552256A (en) | 1978-10-11 | 1978-10-11 | Semicondutor memory |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5552256A true JPS5552256A (en) | 1980-04-16 |
Family
ID=14913520
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12557378A Pending JPS5552256A (en) | 1978-10-11 | 1978-10-11 | Semicondutor memory |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5552256A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5661047A (en) * | 1994-10-05 | 1997-08-26 | United Microelectronics Corporation | Method for forming bipolar ROM device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5375786A (en) * | 1976-12-17 | 1978-07-05 | Fujitsu Ltd | Semiconductor device |
-
1978
- 1978-10-11 JP JP12557378A patent/JPS5552256A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5375786A (en) * | 1976-12-17 | 1978-07-05 | Fujitsu Ltd | Semiconductor device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5661047A (en) * | 1994-10-05 | 1997-08-26 | United Microelectronics Corporation | Method for forming bipolar ROM device |
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