JPS5557184A - Electronic watch - Google Patents

Electronic watch

Info

Publication number
JPS5557184A
JPS5557184A JP12950778A JP12950778A JPS5557184A JP S5557184 A JPS5557184 A JP S5557184A JP 12950778 A JP12950778 A JP 12950778A JP 12950778 A JP12950778 A JP 12950778A JP S5557184 A JPS5557184 A JP S5557184A
Authority
JP
Japan
Prior art keywords
signal
counter
coincidence
pulse
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12950778A
Other languages
Japanese (ja)
Inventor
Shingo Ichikawa
Yoshiaki Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP12950778A priority Critical patent/JPS5557184A/en
Publication of JPS5557184A publication Critical patent/JPS5557184A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To increase the resolution of the variable divider circuit by driving the timing counter with the output signal of the counter which delivers the clock signals with the prescribed count number at the normal time and with the coincidence signal at the operating time of the coincidence signal control circuit respectively.
CONSTITUTION: Counter 5 generates pulse P in the form of second signal 5a with every overflow. Comparator 4 gives always a comparison between output signals 3a and 5b of counters 3 and 5 to generate coincidence pulse Pe to output signal 4a when the coincidence is obtained through the comparison. AND6 receives signal 4a and Q output 7a of FF7, and output 7a never changes to "1" until the pulse is applied by signal 9a of second counter 9. Thus counter 5 supplies second signal 5a of pulse P to counter 9 via OR8 until time t. When counter 9 reaches 60 counts at time t to energize signal 9a, FF7 is set with AND6 opened to make pass the next arriving coincidence pulse. As a result, the resolution can be increased for the variable divider circuit.
COPYRIGHT: (C)1980,JPO&Japio
JP12950778A 1978-10-23 1978-10-23 Electronic watch Pending JPS5557184A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12950778A JPS5557184A (en) 1978-10-23 1978-10-23 Electronic watch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12950778A JPS5557184A (en) 1978-10-23 1978-10-23 Electronic watch

Publications (1)

Publication Number Publication Date
JPS5557184A true JPS5557184A (en) 1980-04-26

Family

ID=15011189

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12950778A Pending JPS5557184A (en) 1978-10-23 1978-10-23 Electronic watch

Country Status (1)

Country Link
JP (1) JPS5557184A (en)

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