JPS5563194A - Conflict preventing device - Google Patents
Conflict preventing deviceInfo
- Publication number
- JPS5563194A JPS5563194A JP13652978A JP13652978A JPS5563194A JP S5563194 A JPS5563194 A JP S5563194A JP 13652978 A JP13652978 A JP 13652978A JP 13652978 A JP13652978 A JP 13652978A JP S5563194 A JPS5563194 A JP S5563194A
- Authority
- JP
- Japan
- Prior art keywords
- secure
- information
- order
- spab
- identification
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
- H04Q11/0407—Selecting arrangements for multiplex systems for time-division multiplexing using a stored program control
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Debugging And Monitoring (AREA)
- Multi Processors (AREA)
- Exchange Systems With Centralized Control (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Abstract
PURPOSE:To secure the test-and-set order of the memory bit correspondence by combining the bit position decoder and the transfer logic sum gate. CONSTITUTION:When test-and-set T.S order of the EXC bit is executed within central process unit 1, the SPAB information is produced within arithmetic circuit ALU300 to be sent out to signal reception distributor SRD204. Then the identification No. of the SPAB information is compared with the contents of register 305 to secure the decision for its own SDR through the comparison coincidence. Thus decoder 309 is operated to send out the information to interface circuit INF205 to secure the identification for the T.S order. In case no coincidence is obtained through the comparison, SDR204 stops its operation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13652978A JPS5563194A (en) | 1978-11-06 | 1978-11-06 | Conflict preventing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13652978A JPS5563194A (en) | 1978-11-06 | 1978-11-06 | Conflict preventing device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5563194A true JPS5563194A (en) | 1980-05-13 |
| JPS5742277B2 JPS5742277B2 (en) | 1982-09-08 |
Family
ID=15177310
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13652978A Granted JPS5563194A (en) | 1978-11-06 | 1978-11-06 | Conflict preventing device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5563194A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59216392A (en) * | 1983-05-24 | 1984-12-06 | Nec Corp | Signal processor |
-
1978
- 1978-11-06 JP JP13652978A patent/JPS5563194A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59216392A (en) * | 1983-05-24 | 1984-12-06 | Nec Corp | Signal processor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5742277B2 (en) | 1982-09-08 |
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