JPS5565446A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5565446A
JPS5565446A JP13867678A JP13867678A JPS5565446A JP S5565446 A JPS5565446 A JP S5565446A JP 13867678 A JP13867678 A JP 13867678A JP 13867678 A JP13867678 A JP 13867678A JP S5565446 A JPS5565446 A JP S5565446A
Authority
JP
Japan
Prior art keywords
openings
region
diffused region
film
regions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13867678A
Other languages
Japanese (ja)
Other versions
JPS6136382B2 (en
Inventor
Katsu Sanada
Shigehisa Wakamatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP13867678A priority Critical patent/JPS5565446A/en
Publication of JPS5565446A publication Critical patent/JPS5565446A/en
Publication of JPS6136382B2 publication Critical patent/JPS6136382B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To eliminate the effect of a substrate material on a diffused region, by fitting an insulating film on a semiconductor substrate having a diffused region, providing openings in regions other than the diffused region, and limiting the paths of molten substrate material to the coated conducting film to these openings.
CONSTITUTION: No.1 insulating film 2 is coated on semiconductor substrate 1, on which a diffused region and electrically insulating region 10 are formed. Opening 6 is provided on the diffused region, and also, openings 9 and 8 are provided on region 10 and other regions. Next, No.1 conducting pattern 3 is provided, which comes into contact with the respective regions in these openings. Then, the entire surface is covered with No.2 insulating film 4. Openings 7 are provided on both ends, and the entire surface is covered with No.2 conducting film 5. By this, even if the material constituting substrate 1 is melted in high temperature heat treatment or in many hours' use and moves into film 5, its paths are limited to opening 8, and no movement from the diffusion region occurs.
COPYRIGHT: (C)1980,JPO&Japio
JP13867678A 1978-11-10 1978-11-10 Semiconductor device Granted JPS5565446A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13867678A JPS5565446A (en) 1978-11-10 1978-11-10 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13867678A JPS5565446A (en) 1978-11-10 1978-11-10 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5565446A true JPS5565446A (en) 1980-05-16
JPS6136382B2 JPS6136382B2 (en) 1986-08-18

Family

ID=15227497

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13867678A Granted JPS5565446A (en) 1978-11-10 1978-11-10 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5565446A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4920066A (en) * 1987-12-31 1990-04-24 Samsung Electronic Co. Ltd. Process for fabricating a high-speed CMOS TTL semiconductor device

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0422188U (en) * 1990-06-08 1992-02-24
JPH0498381U (en) * 1991-01-17 1992-08-25

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53103383A (en) * 1977-02-22 1978-09-08 Toshiba Corp Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53103383A (en) * 1977-02-22 1978-09-08 Toshiba Corp Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4920066A (en) * 1987-12-31 1990-04-24 Samsung Electronic Co. Ltd. Process for fabricating a high-speed CMOS TTL semiconductor device

Also Published As

Publication number Publication date
JPS6136382B2 (en) 1986-08-18

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