JPS556683A - Parallel data processing system - Google Patents

Parallel data processing system

Info

Publication number
JPS556683A
JPS556683A JP7959878A JP7959878A JPS556683A JP S556683 A JPS556683 A JP S556683A JP 7959878 A JP7959878 A JP 7959878A JP 7959878 A JP7959878 A JP 7959878A JP S556683 A JPS556683 A JP S556683A
Authority
JP
Japan
Prior art keywords
circuit
program
processors
stored
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7959878A
Other languages
Japanese (ja)
Other versions
JPS60698B2 (en
Inventor
Taisuke Kanda
Masakatsu Sugimoto
Susumu Sawai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP53079598A priority Critical patent/JPS60698B2/en
Publication of JPS556683A publication Critical patent/JPS556683A/en
Publication of JPS60698B2 publication Critical patent/JPS60698B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To find rapidly a program error through comparisons among several processing results by executing modules, by composing the system of a memory unit stored with the program including several kinds of distinct-program-module change-over instructions and several processors. CONSTITUTION:This system consists of processors 1-1 to 1-3, majority-decision circuit 2, instruction register 3, control register 4, control circuit 5, main memory 6, file 7, output device 8, etc. In this constitution, when a change-over instruction stored in register 3 is read out, distinct program modules MA1, MA2 and MA3 assigned by processors 1-1 to 1-3 are executed and respective processing results are stored in areas P1, P2 and P3. Then, a majority decision among those results is made by circuit 2 and the output of circuit 2 is written to file 7 by unit 8. Consequently, debugging is performed easily and rapidly and the reliability of the system improves.
JP53079598A 1978-06-30 1978-06-30 parallel data processing system Expired JPS60698B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53079598A JPS60698B2 (en) 1978-06-30 1978-06-30 parallel data processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53079598A JPS60698B2 (en) 1978-06-30 1978-06-30 parallel data processing system

Publications (2)

Publication Number Publication Date
JPS556683A true JPS556683A (en) 1980-01-18
JPS60698B2 JPS60698B2 (en) 1985-01-09

Family

ID=13694431

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53079598A Expired JPS60698B2 (en) 1978-06-30 1978-06-30 parallel data processing system

Country Status (1)

Country Link
JP (1) JPS60698B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5862408A (en) * 1981-10-09 1983-04-13 Nippon Gakki Seizo Kk Combustor for liquid fuel

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5862408A (en) * 1981-10-09 1983-04-13 Nippon Gakki Seizo Kk Combustor for liquid fuel

Also Published As

Publication number Publication date
JPS60698B2 (en) 1985-01-09

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