JPS5567845A - Crt character display circuit - Google Patents

Crt character display circuit

Info

Publication number
JPS5567845A
JPS5567845A JP14151878A JP14151878A JPS5567845A JP S5567845 A JPS5567845 A JP S5567845A JP 14151878 A JP14151878 A JP 14151878A JP 14151878 A JP14151878 A JP 14151878A JP S5567845 A JPS5567845 A JP S5567845A
Authority
JP
Japan
Prior art keywords
signal
timing control
circuit
display
character
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14151878A
Other languages
Japanese (ja)
Inventor
Satoru Suzaki
Tsutomu Kondo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP14151878A priority Critical patent/JPS5567845A/en
Publication of JPS5567845A publication Critical patent/JPS5567845A/en
Pending legal-status Critical Current

Links

Landscapes

  • Digital Computer Display Output (AREA)

Abstract

PURPOSE: To realize a free change for the size of the display character by using selectively several timing control circuits which deliver the reading address, the line number data and the clock signal each.
CONSTITUTION: Character information A equivalent to one picture frame is memorized in refresh memory 1 via data bus 11. For the display, selector circuit 7 distributes line selection signals C sent from 1st or 2nd timing control circuits 5 and 6 selected by select signal L, clock signal D, signal compound control signal E and reading address signal H each to the necessary circuit parts. Thus the prescribed address of memory 1 is read out, and the reading data is displayed at the CRT via character generator 2, shift register 3 and signal compound circuit 4 each. The timing control circuit can change the size of the display character according to the velocity of signal D and the contents of signal E.
COPYRIGHT: (C)1980,JPO&Japio
JP14151878A 1978-11-15 1978-11-15 Crt character display circuit Pending JPS5567845A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14151878A JPS5567845A (en) 1978-11-15 1978-11-15 Crt character display circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14151878A JPS5567845A (en) 1978-11-15 1978-11-15 Crt character display circuit

Publications (1)

Publication Number Publication Date
JPS5567845A true JPS5567845A (en) 1980-05-22

Family

ID=15293824

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14151878A Pending JPS5567845A (en) 1978-11-15 1978-11-15 Crt character display circuit

Country Status (1)

Country Link
JP (1) JPS5567845A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5436670A (en) * 1993-04-16 1995-07-25 Mitsubishi Denki Kabushiki Kaisha Image display apparatus wherein the number of characters displayed is the same regardless of the frequency of the input signal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5436670A (en) * 1993-04-16 1995-07-25 Mitsubishi Denki Kabushiki Kaisha Image display apparatus wherein the number of characters displayed is the same regardless of the frequency of the input signal

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