JPS556871A - Multilayer wiring type semiconductor device - Google Patents

Multilayer wiring type semiconductor device

Info

Publication number
JPS556871A
JPS556871A JP7953978A JP7953978A JPS556871A JP S556871 A JPS556871 A JP S556871A JP 7953978 A JP7953978 A JP 7953978A JP 7953978 A JP7953978 A JP 7953978A JP S556871 A JPS556871 A JP S556871A
Authority
JP
Japan
Prior art keywords
film
wiring
insulating film
layer insulating
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7953978A
Other languages
Japanese (ja)
Other versions
JPS6053465B2 (en
Inventor
Masaru Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7953978A priority Critical patent/JPS6053465B2/en
Publication of JPS556871A publication Critical patent/JPS556871A/en
Publication of JPS6053465B2 publication Critical patent/JPS6053465B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To improve the reliability of performance characteristics, by covering a wiring end exposing portion of a foundation metallic film in a laminated metallic film contacting with a layer insulating film and a photo-resist film hardened on a surface of the layer insulating film near the exposing portion.
CONSTITUTION: This device is provided with a silicon substrate 1, a silicon oxide or a silicon nitrising film or these combination insulating film 2, a diffusion element range 3, a lower region wiring Al film 5 in a shpae that contacts with a Pt-Si alloy region or an Al-Si alloy region 4 of an insulating film opening portion of the diffusion element portion and an Al2O3 film 6 between wiring. A main surface is equipped with a layer insulating film 7 such as a SiO2 film or a Si3N4 film, a foundation metallic film such as a Ti-Pt film 8 in a shape that contacts with a fixed opening portion of the layer insulating film 7 and an upper region wiring Ti-Pt-Au film obtained by wiring a laminated film such as a plated Au film 9.
COPYRIGHT: (C)1980,JPO&Japio
JP7953978A 1978-06-29 1978-06-29 Multilayer wiring semiconductor device Expired JPS6053465B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7953978A JPS6053465B2 (en) 1978-06-29 1978-06-29 Multilayer wiring semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7953978A JPS6053465B2 (en) 1978-06-29 1978-06-29 Multilayer wiring semiconductor device

Publications (2)

Publication Number Publication Date
JPS556871A true JPS556871A (en) 1980-01-18
JPS6053465B2 JPS6053465B2 (en) 1985-11-26

Family

ID=13692791

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7953978A Expired JPS6053465B2 (en) 1978-06-29 1978-06-29 Multilayer wiring semiconductor device

Country Status (1)

Country Link
JP (1) JPS6053465B2 (en)

Also Published As

Publication number Publication date
JPS6053465B2 (en) 1985-11-26

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