JPS5577226A - Full-band passing circuit using ctd - Google Patents

Full-band passing circuit using ctd

Info

Publication number
JPS5577226A
JPS5577226A JP14999578A JP14999578A JPS5577226A JP S5577226 A JPS5577226 A JP S5577226A JP 14999578 A JP14999578 A JP 14999578A JP 14999578 A JP14999578 A JP 14999578A JP S5577226 A JPS5577226 A JP S5577226A
Authority
JP
Japan
Prior art keywords
circuit
ctd
terminal
stage
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14999578A
Other languages
Japanese (ja)
Inventor
Izumi Kawakami
Tomokazu Komazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP14999578A priority Critical patent/JPS5577226A/en
Publication of JPS5577226A publication Critical patent/JPS5577226A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H17/02—Frequency selective networks

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Filters That Use Time-Delay Elements (AREA)

Abstract

PURPOSE:To improve greatly the extent of delay and equalization per unit, by employing the constitution of a weight adder circuit, delay circuit of CTD and gain unit of an operational amplifier. CONSTITUTION:The output terminal of input weight adder circuit 12 connected to terminal 11 is connected to the input of prior-stage CTD element Z<-1> and also to the input terminal of output weight adder circuit 14 by way of operational amplifer Q1. Then, the output of prior-stage CTD element Z<-1> connected to post-stage CTD element Z<-1> is connected to the fixed weight terminal of circuit 12 through operational amplifier circuit Q2. Similarly, the output of post-stage CTD element Z<-1> is connected to the fixed weight terminal of circuit 12 by way of operatiolnal amplifier Q4 and also to the fixed weight terminal of circuit 14 by way of operational amplifier Q5. Consequently, the extent of delay and equalization per unit can greatly be improved.
JP14999578A 1978-12-06 1978-12-06 Full-band passing circuit using ctd Pending JPS5577226A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14999578A JPS5577226A (en) 1978-12-06 1978-12-06 Full-band passing circuit using ctd

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14999578A JPS5577226A (en) 1978-12-06 1978-12-06 Full-band passing circuit using ctd

Publications (1)

Publication Number Publication Date
JPS5577226A true JPS5577226A (en) 1980-06-10

Family

ID=15487155

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14999578A Pending JPS5577226A (en) 1978-12-06 1978-12-06 Full-band passing circuit using ctd

Country Status (1)

Country Link
JP (1) JPS5577226A (en)

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