JPS558112A - Stereo demodulation circuit - Google Patents

Stereo demodulation circuit

Info

Publication number
JPS558112A
JPS558112A JP8000978A JP8000978A JPS558112A JP S558112 A JPS558112 A JP S558112A JP 8000978 A JP8000978 A JP 8000978A JP 8000978 A JP8000978 A JP 8000978A JP S558112 A JPS558112 A JP S558112A
Authority
JP
Japan
Prior art keywords
signal
controlled
analog switches
signals
opposite
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8000978A
Other languages
Japanese (ja)
Other versions
JPS593054B2 (en
Inventor
Koji Ishida
Tatsuo Numata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP8000978A priority Critical patent/JPS593054B2/en
Publication of JPS558112A publication Critical patent/JPS558112A/en
Publication of JPS593054B2 publication Critical patent/JPS593054B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H40/00—Arrangements specially adapted for receiving broadcast information
    • H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • H04H40/45—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H04B1/1646—Circuits adapted for the reception of stereophonic signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE:To prevent the lowering of the dynamic range and increment of the distortion rate by using the inverse amplifier and the switching circuit as the demodulation circuits, and thus to secure good isolation between the right and left channel signals. CONSTITUTION:The composite signal obtained through the FM detection is supplied to operational amplifier OP2 which delivers the signals of the opposite phase to OP1. At the stereo reception time, analog switches G1 and G4 are controlled by signal A or the same phase as the subcarrier wave given from control signal generation circuit 5; while analog switches G2 and G3 are controlled by signal B of the opposite phase to signal A. And the L- and R-channel information from which the leak component of the opposite channels to each other is deleted are delivered through operational amplifiers OP3 and OP4. With adjustment of the gain of OP2, the separation adjustment becomes possible. Furthermore, if resistances R4-R9 plus R9-R12 are set equal to each other, the output of the same level is possible for both L- and R-channel signals.
JP8000978A 1978-06-30 1978-06-30 stereo demodulation circuit Expired JPS593054B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8000978A JPS593054B2 (en) 1978-06-30 1978-06-30 stereo demodulation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8000978A JPS593054B2 (en) 1978-06-30 1978-06-30 stereo demodulation circuit

Publications (2)

Publication Number Publication Date
JPS558112A true JPS558112A (en) 1980-01-21
JPS593054B2 JPS593054B2 (en) 1984-01-21

Family

ID=13706320

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8000978A Expired JPS593054B2 (en) 1978-06-30 1978-06-30 stereo demodulation circuit

Country Status (1)

Country Link
JP (1) JPS593054B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63165978A (en) * 1986-12-27 1988-07-09 Sony Corp Multiplication circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02176239A (en) * 1988-12-28 1990-07-09 Yunitsuta Kk Reduction gear for small prime mover

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63165978A (en) * 1986-12-27 1988-07-09 Sony Corp Multiplication circuit

Also Published As

Publication number Publication date
JPS593054B2 (en) 1984-01-21

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