JPS558135A - Rewritable programable logic array - Google Patents
Rewritable programable logic arrayInfo
- Publication number
- JPS558135A JPS558135A JP8053178A JP8053178A JPS558135A JP S558135 A JPS558135 A JP S558135A JP 8053178 A JP8053178 A JP 8053178A JP 8053178 A JP8053178 A JP 8053178A JP S558135 A JPS558135 A JP S558135A
- Authority
- JP
- Japan
- Prior art keywords
- lines
- reading
- rewritable
- inversion
- input signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000006870 function Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
- H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
- H03K19/17712—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays one of the matrices at least being reprogrammable
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8053178A JPS558135A (en) | 1978-07-04 | 1978-07-04 | Rewritable programable logic array |
| US06/055,009 US4336601A (en) | 1978-07-04 | 1979-07-05 | Rewritable programmable logic array |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8053178A JPS558135A (en) | 1978-07-04 | 1978-07-04 | Rewritable programable logic array |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS558135A true JPS558135A (en) | 1980-01-21 |
Family
ID=13720912
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8053178A Pending JPS558135A (en) | 1978-07-04 | 1978-07-04 | Rewritable programable logic array |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US4336601A (ja) |
| JP (1) | JPS558135A (ja) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03132212A (ja) * | 1989-07-28 | 1991-06-05 | Xilinx Inc | 構成を変更可能な論理アレイ |
Families Citing this family (36)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4415818A (en) * | 1979-01-16 | 1983-11-15 | Nippon Telegraph & Telephone Corp. | Programmable sequential logic circuit devices |
| US4482953A (en) * | 1980-05-30 | 1984-11-13 | Fairchild Camera & Instrument Corporation | Computer with console addressable PLA storing control microcode and microinstructions for self-test of internal registers and ALU |
| US4495590A (en) * | 1980-12-31 | 1985-01-22 | International Business Machines Corporation | PLA With time division multiplex feature for improved density |
| US4660171A (en) * | 1981-12-21 | 1987-04-21 | International Business Machines Corp. | Apparatus and method using a programmable logic array for decoding an operation code and providing a plurality of sequential output states |
| US4490812A (en) * | 1982-09-30 | 1984-12-25 | Mostek Corporation | User reprogrammable programmed logic array |
| USRE34363E (en) * | 1984-03-12 | 1993-08-31 | Xilinx, Inc. | Configurable electrical circuit having configurable logic elements and configurable interconnects |
| JPS60204118A (ja) | 1984-03-28 | 1985-10-15 | Toshiba Corp | 任意の論理関数を実現する方法及び装置 |
| US4617479B1 (en) * | 1984-05-03 | 1993-09-21 | Altera Semiconductor Corp. | Programmable logic array device using eprom technology |
| US4766532A (en) * | 1985-04-30 | 1988-08-23 | International Business Machines Corporation | Sequential array logic |
| US4700187A (en) * | 1985-12-02 | 1987-10-13 | Concurrent Logic, Inc. | Programmable, asynchronous logic cell and array |
| EP0238230B1 (en) * | 1986-03-06 | 1992-12-23 | Advanced Micro Devices, Inc. | Programmable logic device |
| US4791603A (en) * | 1986-07-18 | 1988-12-13 | Honeywell Inc. | Dynamically reconfigurable array logic |
| GB8621357D0 (en) * | 1986-09-04 | 1986-10-15 | Mcallister R I | Hinged barrier semiconductor integrated circuits |
| US5089973A (en) * | 1986-11-07 | 1992-02-18 | Apple Computer Inc. | Programmable logic cell and array |
| US4918440A (en) * | 1986-11-07 | 1990-04-17 | Furtek Frederick C | Programmable logic cell and array |
| US5019736A (en) * | 1986-11-07 | 1991-05-28 | Concurrent Logic, Inc. | Programmable logic cell and array |
| US4730130A (en) * | 1987-01-05 | 1988-03-08 | Motorola, Inc. | Writable array logic |
| US4761570A (en) * | 1987-02-12 | 1988-08-02 | Harris Corporation | Programmable logic device with programmable signal inhibition and inversion means |
| US4839851A (en) * | 1987-07-13 | 1989-06-13 | Idaho Research Foundation, Inc. | Programmable data path device |
| US4972105A (en) * | 1989-09-22 | 1990-11-20 | The U.S. Government As Represented By The Director, National Security Agency | Programmable configurable logic memory |
| US5099453A (en) * | 1989-09-29 | 1992-03-24 | Sgs-Thomson Microelectronics, Inc. | Configuration memory for programmable logic device |
| US5144166A (en) * | 1990-11-02 | 1992-09-01 | Concurrent Logic, Inc. | Programmable logic cell and array |
| KR0120579B1 (ko) * | 1994-07-14 | 1997-10-30 | 김주용 | 리 프로그램가능한 프로그램어블 로직 어래이 |
| US5742180A (en) * | 1995-02-10 | 1998-04-21 | Massachusetts Institute Of Technology | Dynamically programmable gate array with multiple contexts |
| US6052773A (en) * | 1995-02-10 | 2000-04-18 | Massachusetts Institute Of Technology | DPGA-coupled microprocessors |
| US5664402A (en) * | 1995-09-28 | 1997-09-09 | Gary W. Clem, Inc. | Method and means for harvesting and packaging seeds |
| US5982196A (en) * | 1997-04-22 | 1999-11-09 | Waferscale Integration, Inc. | Programmable logic device producing a complementary bit line signal |
| DE69930235D1 (de) * | 1999-05-03 | 2006-05-04 | St Microelectronics Sa | Schaltung zur Steuerung der Datenspeicherung |
| JP5203594B2 (ja) * | 2006-11-07 | 2013-06-05 | 株式会社東芝 | 暗号処理回路及び暗号処理方法 |
| JP4851947B2 (ja) * | 2007-01-29 | 2012-01-11 | 株式会社東芝 | 論理回路 |
| US8661394B1 (en) | 2008-09-24 | 2014-02-25 | Iowa State University Research Foundation, Inc. | Depth-optimal mapping of logic chains in reconfigurable fabrics |
| US8438522B1 (en) | 2008-09-24 | 2013-05-07 | Iowa State University Research Foundation, Inc. | Logic element architecture for generic logic chains in programmable devices |
| US8476689B2 (en) * | 2008-12-23 | 2013-07-02 | Augustine Wei-Chun Chang | Super CMOS devices on a microelectronics system |
| US9853643B2 (en) | 2008-12-23 | 2017-12-26 | Schottky Lsi, Inc. | Schottky-CMOS asynchronous logic cells |
| US11955476B2 (en) | 2008-12-23 | 2024-04-09 | Schottky Lsi, Inc. | Super CMOS devices on a microelectronics system |
| US11342916B2 (en) | 2008-12-23 | 2022-05-24 | Schottky Lsi, Inc. | Schottky-CMOS asynchronous logic cells |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3925684A (en) * | 1974-03-11 | 1975-12-09 | Hughes Aircraft Co | Universal logic gate |
| IT1042852B (it) * | 1974-09-30 | 1980-01-30 | Siemens Ag | Disposizione di circuiti logici integrata e programmabile |
| US3987286A (en) * | 1974-12-20 | 1976-10-19 | International Business Machines Corporation | Time split array logic element and method of operation |
| US3936812A (en) * | 1974-12-30 | 1976-02-03 | Ibm Corporation | Segmented parallel rail paths for input/output signals |
| US3987287A (en) * | 1974-12-30 | 1976-10-19 | International Business Machines Corporation | High density logic array |
| US4084152A (en) * | 1976-06-30 | 1978-04-11 | International Business Machines Corporation | Time shared programmable logic array |
| US4207556A (en) * | 1976-12-14 | 1980-06-10 | Nippon Telegraph And Telephone Public Corporation | Programmable logic array arrangement |
| US4124899A (en) * | 1977-05-23 | 1978-11-07 | Monolithic Memories, Inc. | Programmable array logic circuit |
| FR2396468A1 (fr) * | 1977-06-30 | 1979-01-26 | Ibm France | Perfectionnement aux reseaux logiques programmables |
| US4195352A (en) * | 1977-07-08 | 1980-03-25 | Xerox Corporation | Split programmable logic array |
| US4233667A (en) * | 1978-10-23 | 1980-11-11 | International Business Machines Corporation | Demand powered programmable logic array |
| US4245324A (en) * | 1978-12-15 | 1981-01-13 | International Business Machines Corporation | Compact programmable logic read array having multiple outputs |
-
1978
- 1978-07-04 JP JP8053178A patent/JPS558135A/ja active Pending
-
1979
- 1979-07-05 US US06/055,009 patent/US4336601A/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03132212A (ja) * | 1989-07-28 | 1991-06-05 | Xilinx Inc | 構成を変更可能な論理アレイ |
Also Published As
| Publication number | Publication date |
|---|---|
| US4336601A (en) | 1982-06-22 |
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