JPS5583916A - Interruption report circuit - Google Patents

Interruption report circuit

Info

Publication number
JPS5583916A
JPS5583916A JP15643978A JP15643978A JPS5583916A JP S5583916 A JPS5583916 A JP S5583916A JP 15643978 A JP15643978 A JP 15643978A JP 15643978 A JP15643978 A JP 15643978A JP S5583916 A JPS5583916 A JP S5583916A
Authority
JP
Japan
Prior art keywords
interruption
factor
flop
flip
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15643978A
Other languages
Japanese (ja)
Other versions
JPS617666B2 (en
Inventor
Takashi Domoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15643978A priority Critical patent/JPS5583916A/en
Publication of JPS5583916A publication Critical patent/JPS5583916A/en
Publication of JPS617666B2 publication Critical patent/JPS617666B2/ja
Granted legal-status Critical Current

Links

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  • Bus Control (AREA)

Abstract

PURPOSE: To ensure reporting without impairing the data to give resetting to the interruption reported flag within the operator console via the reset order which is given at then multi-switching time and thus securing the second automatic generation of interruption if the factor exists within the console.
CONSTITUTION: The circuit consists of the terminal controller plus plural number of terminal units. The terminal unit possesses flip-flop (flag) 44 for the interruption factor. Thus flip-flop 44 is set when the interruption factor is generated within the terminal unit, and the factor is reported with reception of the interruption retrieval signal from the terminal controller. After this, flip-flop 44 is reset. In such transmission system, the initial retrieval information showing that the terminal controller or the higher-rank computer is under initialization is added to the interruption retrieval signal. When receiving the retrieval information, the terminal unit decides the interruption factor of its own and then sets flip-flop 44 if some factor exists.
COPYRIGHT: (C)1980,JPO&Japio
JP15643978A 1978-12-20 1978-12-20 Interruption report circuit Granted JPS5583916A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15643978A JPS5583916A (en) 1978-12-20 1978-12-20 Interruption report circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15643978A JPS5583916A (en) 1978-12-20 1978-12-20 Interruption report circuit

Publications (2)

Publication Number Publication Date
JPS5583916A true JPS5583916A (en) 1980-06-24
JPS617666B2 JPS617666B2 (en) 1986-03-07

Family

ID=15627770

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15643978A Granted JPS5583916A (en) 1978-12-20 1978-12-20 Interruption report circuit

Country Status (1)

Country Link
JP (1) JPS5583916A (en)

Also Published As

Publication number Publication date
JPS617666B2 (en) 1986-03-07

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