JPS5585949A - Display unit - Google Patents

Display unit

Info

Publication number
JPS5585949A
JPS5585949A JP15749978A JP15749978A JPS5585949A JP S5585949 A JPS5585949 A JP S5585949A JP 15749978 A JP15749978 A JP 15749978A JP 15749978 A JP15749978 A JP 15749978A JP S5585949 A JPS5585949 A JP S5585949A
Authority
JP
Japan
Prior art keywords
signal
circuit
synchronizing
inputted
extended
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15749978A
Other languages
Japanese (ja)
Other versions
JPS581431B2 (en
Inventor
Hirokazu Ando
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP53157499A priority Critical patent/JPS581431B2/en
Publication of JPS5585949A publication Critical patent/JPS5585949A/en
Publication of JPS581431B2 publication Critical patent/JPS581431B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Digital Computer Display Output (AREA)

Abstract

PURPOSE: To easily extend the display character and space, by changing the alteration constant of the vertical deflection output predetermined in synchronizing with the horizontal synchronizing signal so that the scanning distance can be extended or shrinked.
CONSTITUTION: The dot timing signal DT from the oscillation circuit 4 is inputted to the timing circuit 5, which produces the character count signal C, raster counter signal R, and line counter signal L and inputs them to the synchronizing generating circuit 6. From the circuit 6, horizontal synchronizing signal H, vertical synchronizing signal V and raster signal Rn are produced and the signals H, V are inputted respectively to the horizontal deflection circuit 11. The signals H, Rn are inputted to the skip circuit 7 and the decode output fn decoding 8 the readout data D from the display memory 1 is inputted to the circuit 7. The circuit 7 produces the skip signal K in synchronizing with the signal H according to the signal fn, inputs it to the circuit 11, and the vertical scanning interval can be extended or shrinked by changing the integrating time constant of the circuit 11. Thus, the display character and space can easily be extended.
COPYRIGHT: (C)1980,JPO&Japio
JP53157499A 1978-12-22 1978-12-22 display device Expired JPS581431B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53157499A JPS581431B2 (en) 1978-12-22 1978-12-22 display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53157499A JPS581431B2 (en) 1978-12-22 1978-12-22 display device

Publications (2)

Publication Number Publication Date
JPS5585949A true JPS5585949A (en) 1980-06-28
JPS581431B2 JPS581431B2 (en) 1983-01-11

Family

ID=15651013

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53157499A Expired JPS581431B2 (en) 1978-12-22 1978-12-22 display device

Country Status (1)

Country Link
JP (1) JPS581431B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02309915A (en) * 1989-05-25 1990-12-25 Hiromi Fujitani Mat floor and mattress enabling sleeping warmly without necessitating heater and special bedclothes even in midwinter

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4841639A (en) * 1971-09-27 1973-06-18
JPS4882736A (en) * 1972-02-04 1973-11-05
JPS53103325A (en) * 1977-02-19 1978-09-08 Int Computers Ltd Data display unit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4841639A (en) * 1971-09-27 1973-06-18
JPS4882736A (en) * 1972-02-04 1973-11-05
JPS53103325A (en) * 1977-02-19 1978-09-08 Int Computers Ltd Data display unit

Also Published As

Publication number Publication date
JPS581431B2 (en) 1983-01-11

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