JPS5588454A - Fault detector circuit for phase control oscillator - Google Patents
Fault detector circuit for phase control oscillatorInfo
- Publication number
- JPS5588454A JPS5588454A JP16244578A JP16244578A JPS5588454A JP S5588454 A JPS5588454 A JP S5588454A JP 16244578 A JP16244578 A JP 16244578A JP 16244578 A JP16244578 A JP 16244578A JP S5588454 A JPS5588454 A JP S5588454A
- Authority
- JP
- Japan
- Prior art keywords
- divider
- output
- flip
- logic level
- phase control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 125000004122 cyclic group Chemical group 0.000 abstract 1
- 238000001514 detection method Methods 0.000 abstract 1
- 230000001360 synchronised effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0079—Receiver details
- H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
PURPOSE:To realize most of the fault detection for the phase control oscillator through a simple circuit constitution. CONSTITUTION:In case the phase control system has some fault with the free run of the output frequency, output pulse D of divider 12 entering the trigger terminal of flip-flop 16 features the cyclic phase relation of D and C' to reverse output pulse C' of divider 11. Under such phase relation, logic level ''1'' of C' of divider 11 is written into flip-flop 16 via the rise of output pulse D' of divider 12, and thus the output of OR gate 18 becomes logic level ''1''. In this case, logic level ''1'' is written also into flip-flop 17 in the same way. When the input signal of the phase synchronous oscillator is cut off, the output pulse of divider 11 is fixed to logic level ''1'' or ''0''. And the output of either one of flip-flops 16 and 17 features ''1'', and accordingly the output of gate 18 features also ''1''.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16244578A JPS5588454A (en) | 1978-12-26 | 1978-12-26 | Fault detector circuit for phase control oscillator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16244578A JPS5588454A (en) | 1978-12-26 | 1978-12-26 | Fault detector circuit for phase control oscillator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5588454A true JPS5588454A (en) | 1980-07-04 |
| JPS6214148B2 JPS6214148B2 (en) | 1987-03-31 |
Family
ID=15754740
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16244578A Granted JPS5588454A (en) | 1978-12-26 | 1978-12-26 | Fault detector circuit for phase control oscillator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5588454A (en) |
-
1978
- 1978-12-26 JP JP16244578A patent/JPS5588454A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6214148B2 (en) | 1987-03-31 |
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