JPS5593318A - Automatic frequency control system in receiver - Google Patents

Automatic frequency control system in receiver

Info

Publication number
JPS5593318A
JPS5593318A JP118279A JP118279A JPS5593318A JP S5593318 A JPS5593318 A JP S5593318A JP 118279 A JP118279 A JP 118279A JP 118279 A JP118279 A JP 118279A JP S5593318 A JPS5593318 A JP S5593318A
Authority
JP
Japan
Prior art keywords
afc
data
memory
bit
frequency control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP118279A
Other languages
Japanese (ja)
Other versions
JPS5920283B2 (en
Inventor
Kenji Kaneko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP54001182A priority Critical patent/JPS5920283B2/en
Publication of JPS5593318A publication Critical patent/JPS5593318A/en
Publication of JPS5920283B2 publication Critical patent/JPS5920283B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE: To enable to perform fine automatic tuning, by providing the data for automatic frequency control as the channel selection data in the memory.
CONSTITUTION: One bit out of the data read out from the memory is taken as AFC data. When this bit is 1, the output "1" is fed to the AFC switch 21 to introduce the AFC voltage to the electronic tuner 2. When AFC is unrequired, this bit can simply be changed into "0" with the operator, and if no AFC is required during the reception, it can be set to "0" and the data is written in the memory. Further, at the selection of receiving station, the AFC voltage is disconnected with the AFC switch to avoid the AFC loop from being drawn into other carrier.
COPYRIGHT: (C)1980,JPO&Japio
JP54001182A 1979-01-08 1979-01-08 Automatic frequency control method in receiver Expired JPS5920283B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54001182A JPS5920283B2 (en) 1979-01-08 1979-01-08 Automatic frequency control method in receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54001182A JPS5920283B2 (en) 1979-01-08 1979-01-08 Automatic frequency control method in receiver

Publications (2)

Publication Number Publication Date
JPS5593318A true JPS5593318A (en) 1980-07-15
JPS5920283B2 JPS5920283B2 (en) 1984-05-12

Family

ID=11494301

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54001182A Expired JPS5920283B2 (en) 1979-01-08 1979-01-08 Automatic frequency control method in receiver

Country Status (1)

Country Link
JP (1) JPS5920283B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07162273A (en) * 1993-09-21 1995-06-23 Lg Electron Inc Digital tuning device and tuning control method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07162273A (en) * 1993-09-21 1995-06-23 Lg Electron Inc Digital tuning device and tuning control method

Also Published As

Publication number Publication date
JPS5920283B2 (en) 1984-05-12

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