JPS5595467A - Synchronizing signal generator - Google Patents

Synchronizing signal generator

Info

Publication number
JPS5595467A
JPS5595467A JP209579A JP209579A JPS5595467A JP S5595467 A JPS5595467 A JP S5595467A JP 209579 A JP209579 A JP 209579A JP 209579 A JP209579 A JP 209579A JP S5595467 A JPS5595467 A JP S5595467A
Authority
JP
Japan
Prior art keywords
signal
synchronizing
circuit
synchronizing signal
horizontal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP209579A
Other languages
Japanese (ja)
Inventor
Yoshihiro Morioka
Takashi Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP209579A priority Critical patent/JPS5595467A/en
Publication of JPS5595467A publication Critical patent/JPS5595467A/en
Pending legal-status Critical Current

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  • Synchronizing For Television (AREA)

Abstract

PURPOSE: To attain the gen-lock of a PAL-system synchronizing signal generator by generating a reference signal and then by forming a synchronizing signal by mixing various synchronizing signals on the basis of the reference signal.
CONSTITUTION: A synchronizing signal generator consists of reference signal generating circuit 10 and synthesizer circuit 20 which obtains various synchronizing signals on the basis of the reference signal. Then, the oscillation frequency of original oscillator 1 is set four times as high as that of a chrominance subcarrier and its output is supplied to a 1/4-dividing counter to generate chrominance subcarrier signal Sc. The original oscillation output is supplied to counter 3 and divided by 909 to obtain horizontal synchronizing frequency SH. On the other hand, PLL circuit 4 generates signal nfH of a frequency an integer greater than horizontal synchronizing frequency fH, which is supplied as reference signal Sn to circuit 20 to generate each synchronizing signal. Horizontal period PH is phase-compared by PLL with the signal of fH, and by the output, VCO is controlled to synchronize the horizontal signal of circuit 20 with fH. With switches SW1∼SW3 placed at the EXT side, chrominance subcarrier signal Sc, horizontal synchronizing signal PH and vertical synchronizing signal Pv synchronize with an external synchronizing signal.
COPYRIGHT: (C)1980,JPO&Japio
JP209579A 1979-01-11 1979-01-11 Synchronizing signal generator Pending JPS5595467A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP209579A JPS5595467A (en) 1979-01-11 1979-01-11 Synchronizing signal generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP209579A JPS5595467A (en) 1979-01-11 1979-01-11 Synchronizing signal generator

Publications (1)

Publication Number Publication Date
JPS5595467A true JPS5595467A (en) 1980-07-19

Family

ID=11519780

Family Applications (1)

Application Number Title Priority Date Filing Date
JP209579A Pending JPS5595467A (en) 1979-01-11 1979-01-11 Synchronizing signal generator

Country Status (1)

Country Link
JP (1) JPS5595467A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60203094A (en) * 1983-12-14 1985-10-14 テレフンケン・フエルンゼ−・ウント・ルントフンク・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング Circuit device that time compresses or expands video signals

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60203094A (en) * 1983-12-14 1985-10-14 テレフンケン・フエルンゼ−・ウント・ルントフンク・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング Circuit device that time compresses or expands video signals

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