JPS55960A - Clock distributor - Google Patents

Abstract

PURPOSE:To half-automate a phase adjustment of a clock signal to each unit by measuring a phase difference between a signal from a clock supply and the clock signal supplied to each unit and then by storing the measurement value to set the dalay time of a delay method. CONSTITUTION:Control part 10 consists of phase-difference measuring instrument 11, memory methods 12-1 to 12-3, maximum value circuit 13, and substracter 14, and delay methods 5' to 7' are all given the same set value first. Then, cable 9 is connected to unit 2 and switch S1 is depressed to measure a difference in phase between clock signal CL from clock supply 1 and clock signal (a) supplied to the unit, which is stored in method 12-1. Similar measurements of units 3 and 4 are exercised and measurement values are stored in methods 12-2 and 12-3. With S2 depressed, the maxinum value in memory method 12 of each unit is selected by circuit 13 and outputted, subtracter 14 subtracts the value of each method 12 from that of circuit 13 to stored the obtained value in each memory method, and consequently dalay time required for delay method 5' to 7' can be obtained, thereby adjusting delay methods 5' to 7' to the value.