JPS56101261A - Disc device - Google Patents
Disc deviceInfo
- Publication number
- JPS56101261A JPS56101261A JP327180A JP327180A JPS56101261A JP S56101261 A JPS56101261 A JP S56101261A JP 327180 A JP327180 A JP 327180A JP 327180 A JP327180 A JP 327180A JP S56101261 A JPS56101261 A JP S56101261A
- Authority
- JP
- Japan
- Prior art keywords
- write
- disc
- buffer memory
- parallel
- finished
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
- G06F5/16—Multiplexed systems, i.e. using two or more similar devices which are alternately accessed for enqueue and dequeue operations, e.g. ping-pong buffers
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Abstract
PURPOSE:To enable to transfer the information from the disc externally in parallel with the write-in operation from the disc to the buffer memory, by providing the buffer memory of the first-in and first-out with the disc controller. CONSTITUTION:The buffer memory is sectioned into blocks of M1-Mn and the output of the disc buffer memory is converted into parallel information with the serial/parallel data conversion circuit 7, and write-in is sequentially made to the block M1 first under the control of the timing generating circuit 8 controlled with the disc controller. When the write-in to M1 is finished, write-in is sequentially made from the block M2 to M3 on and after. When the write-in to the block M1 is finished, the memory content is sequentially read out and converted into serial information at the parallel/serial conversion circuit 16 and transmitted externally. When the readout of M1 is finished, readout is moved to M2, M3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP327180A JPS56101261A (en) | 1980-01-16 | 1980-01-16 | Disc device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP327180A JPS56101261A (en) | 1980-01-16 | 1980-01-16 | Disc device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS56101261A true JPS56101261A (en) | 1981-08-13 |
Family
ID=11552777
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP327180A Pending JPS56101261A (en) | 1980-01-16 | 1980-01-16 | Disc device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56101261A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60156159A (en) * | 1984-01-25 | 1985-08-16 | Hitachi Ltd | magnetic bubble memory device |
| US5274589A (en) * | 1990-11-21 | 1993-12-28 | Nippon Steel Corporation | Method and apparatus for writing and reading data to/from a memory |
-
1980
- 1980-01-16 JP JP327180A patent/JPS56101261A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60156159A (en) * | 1984-01-25 | 1985-08-16 | Hitachi Ltd | magnetic bubble memory device |
| US5274589A (en) * | 1990-11-21 | 1993-12-28 | Nippon Steel Corporation | Method and apparatus for writing and reading data to/from a memory |
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