JPS56111197A - Two-bit error correction system - Google Patents

Two-bit error correction system

Info

Publication number
JPS56111197A
JPS56111197A JP1132880A JP1132880A JPS56111197A JP S56111197 A JPS56111197 A JP S56111197A JP 1132880 A JP1132880 A JP 1132880A JP 1132880 A JP1132880 A JP 1132880A JP S56111197 A JPS56111197 A JP S56111197A
Authority
JP
Japan
Prior art keywords
bit
error
bit error
ecc
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1132880A
Other languages
Japanese (ja)
Inventor
Takashi Aoki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1132880A priority Critical patent/JPS56111197A/en
Publication of JPS56111197A publication Critical patent/JPS56111197A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Detection And Correction Of Errors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To enable to correct 2-bit errors without using the two-bit error correcting code (ECC), by the parity check per each block of a plurality of data added with the 2-bit error detection code for error correction. CONSTITUTION:A plurality of data added with ECC having 1-bit error correction 2-bit error detecting functions in which one word has a given bit, are stored in the memory 1. At the same time, parity bits are provided every bit location of each word and this is stored in the block parity area 1-2 of the memory 1. With this state, the data such as address YA of the memory 1 are read out and a bit error is detected with ECC of the error correcting code area, then checking is made with the parity data of the area 1-2 for each data block per bit, and the error production bits dm, dn are detected from the error presence bits Xm, Xn for the address YA, allowing to correct the 2-bit error with a simple constitution not requiring 2-bit the correction ECC.
JP1132880A 1980-02-01 1980-02-01 Two-bit error correction system Pending JPS56111197A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1132880A JPS56111197A (en) 1980-02-01 1980-02-01 Two-bit error correction system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1132880A JPS56111197A (en) 1980-02-01 1980-02-01 Two-bit error correction system

Publications (1)

Publication Number Publication Date
JPS56111197A true JPS56111197A (en) 1981-09-02

Family

ID=11774954

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1132880A Pending JPS56111197A (en) 1980-02-01 1980-02-01 Two-bit error correction system

Country Status (1)

Country Link
JP (1) JPS56111197A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02278355A (en) * 1989-03-10 1990-11-14 Internatl Business Mach Corp <Ibm> Fault tolerant memory system
JPH02278449A (en) * 1989-03-10 1990-11-14 Internatl Business Mach Corp <Ibm> Fault tolerant memory system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02278355A (en) * 1989-03-10 1990-11-14 Internatl Business Mach Corp <Ibm> Fault tolerant memory system
JPH02278449A (en) * 1989-03-10 1990-11-14 Internatl Business Mach Corp <Ibm> Fault tolerant memory system

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