JPS56122169A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56122169A
JPS56122169A JP2584280A JP2584280A JPS56122169A JP S56122169 A JPS56122169 A JP S56122169A JP 2584280 A JP2584280 A JP 2584280A JP 2584280 A JP2584280 A JP 2584280A JP S56122169 A JPS56122169 A JP S56122169A
Authority
JP
Japan
Prior art keywords
type
ccd
photoresist
mask
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2584280A
Other languages
Japanese (ja)
Inventor
Yoshihiro Miyamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2584280A priority Critical patent/JPS56122169A/en
Publication of JPS56122169A publication Critical patent/JPS56122169A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/335—Channel regions of field-effect devices of charge-coupled devices

Landscapes

  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To simplify the steps of manufacturing a semiconductor device by forming a mask with photoresist on a semiconductor substrate to be formed with a surface channel CCD to form a buried channel CCD, then removing the mask and forming a surface channel CCD. CONSTITUTION:The first oxide film 2 is covered on the upper surface of a silicon semiconductor substrate 1. A photoresist 3 is formed with a mask on the upper surface of a surface channel (SC) type CCD forming region X, phosphorus ion (P<+>) is injected to form an N<+> type impuritydoped layer 5 on the region not masked, and a buried channel (BC) type CCD is formed. Thereafter, the photoresist 3 is removed, the first insulating electrode 6, the second insulating electrode 11 and oxide films 9, 12 are formed on the upper surface of the oxide film 2, and P<+> type layer 8 and N<-> type layer 8' becoming charge guide regions are formed on the surface of the substrate 1. Thus, two phase CCD of the SC type BC type are simultaneously formed on the same substrate.
JP2584280A 1980-02-29 1980-02-29 Manufacture of semiconductor device Pending JPS56122169A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2584280A JPS56122169A (en) 1980-02-29 1980-02-29 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2584280A JPS56122169A (en) 1980-02-29 1980-02-29 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS56122169A true JPS56122169A (en) 1981-09-25

Family

ID=12177096

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2584280A Pending JPS56122169A (en) 1980-02-29 1980-02-29 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56122169A (en)

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