JPS5618480A - Manufacture of display device - Google Patents

Manufacture of display device

Info

Publication number
JPS5618480A
JPS5618480A JP9258179A JP9258179A JPS5618480A JP S5618480 A JPS5618480 A JP S5618480A JP 9258179 A JP9258179 A JP 9258179A JP 9258179 A JP9258179 A JP 9258179A JP S5618480 A JPS5618480 A JP S5618480A
Authority
JP
Japan
Prior art keywords
substrate
led
dry film
die pad
wiring layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9258179A
Other languages
Japanese (ja)
Other versions
JPS6155773B2 (en
Inventor
Osamu Ichikawa
Tetsuo Sadamasa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP9258179A priority Critical patent/JPS5618480A/en
Publication of JPS5618480A publication Critical patent/JPS5618480A/en
Publication of JPS6155773B2 publication Critical patent/JPS6155773B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)
  • Die Bonding (AREA)
  • Led Device Packages (AREA)

Abstract

PURPOSE:To eliminate improper positioning and shorting between wires in a display device by forming a photoresist on the entire substrate excluding a die pad of an LED carrying substrate, coating thermosetting conductive adhesive thereon, and matching the pellets. CONSTITUTION:A metallic wiring layer 32 is formed on a ceramic substrate 31, and an insulating layer 33 is formed on the surface of the substrate excluding the die pad portion for carrying the LED pellet. Then, a desired pattern metallic wiring layer 34 and a dry film 39 are formed thereon. Thereafter, electroconductive thermosetting adhesive is dropped to the die pad portion opened with a dry film 39 to drop the LED pellets 36a, 36b through the openings of the dry film 39 as aids to match the positions, heat treated, and cleaned on the surface of the substrate. Finally, anode electrodes 37a, 37b and metallic wiring layer 34 are bonded onto the LED pellet with Au wire 38.
JP9258179A 1979-07-23 1979-07-23 Manufacture of display device Granted JPS5618480A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9258179A JPS5618480A (en) 1979-07-23 1979-07-23 Manufacture of display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9258179A JPS5618480A (en) 1979-07-23 1979-07-23 Manufacture of display device

Publications (2)

Publication Number Publication Date
JPS5618480A true JPS5618480A (en) 1981-02-21
JPS6155773B2 JPS6155773B2 (en) 1986-11-29

Family

ID=14058389

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9258179A Granted JPS5618480A (en) 1979-07-23 1979-07-23 Manufacture of display device

Country Status (1)

Country Link
JP (1) JPS5618480A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5844726A (en) * 1981-09-11 1983-03-15 Nippon Telegr & Teleph Corp <Ntt> Gettering method
JPS6349454A (en) * 1986-08-18 1988-03-02 Rohm Co Ltd Thermal head
JPH09293744A (en) * 1996-02-29 1997-11-11 Denso Corp Electronic component mounting method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51126068A (en) * 1975-04-25 1976-11-02 Hitachi Ltd Manufacturing method of semi-conductor equipment

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51126068A (en) * 1975-04-25 1976-11-02 Hitachi Ltd Manufacturing method of semi-conductor equipment

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5844726A (en) * 1981-09-11 1983-03-15 Nippon Telegr & Teleph Corp <Ntt> Gettering method
JPS6349454A (en) * 1986-08-18 1988-03-02 Rohm Co Ltd Thermal head
JPH09293744A (en) * 1996-02-29 1997-11-11 Denso Corp Electronic component mounting method

Also Published As

Publication number Publication date
JPS6155773B2 (en) 1986-11-29

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