JPS5640929A - Power supply control circuit for electronic apparatus - Google Patents

Power supply control circuit for electronic apparatus

Info

Publication number
JPS5640929A
JPS5640929A JP11696779A JP11696779A JPS5640929A JP S5640929 A JPS5640929 A JP S5640929A JP 11696779 A JP11696779 A JP 11696779A JP 11696779 A JP11696779 A JP 11696779A JP S5640929 A JPS5640929 A JP S5640929A
Authority
JP
Japan
Prior art keywords
cpu9
circuit
voltage
power supply
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11696779A
Other languages
Japanese (ja)
Other versions
JPS5840204B2 (en
Inventor
Shunichi Sakaguchi
Hideaki Aya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Tateisi Electronics Co filed Critical Omron Tateisi Electronics Co
Priority to JP54116967A priority Critical patent/JPS5840204B2/en
Publication of JPS5640929A publication Critical patent/JPS5640929A/en
Publication of JPS5840204B2 publication Critical patent/JPS5840204B2/en
Expired legal-status Critical Current

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Abstract

PURPOSE: To realize the necessary processes after break of the power supply and without discontinuing the operation of the arithmetic processor in case the power source has a value lower than the fixed voltage level, by resetting assuredly the arithmetic processor when the power source is switched on.
CONSTITUTION: The fact that the voltage applied to the DC stabilizing circuit 2 has turned to the 1st and 2nd voltages are detected by the 1st and 2nd detecting circuits 3 and 4 each. The initial resetting is carried out for the CPU9 by the output of the circuit 4. At the same time, the interruption signal is applied to the CPU9, and then the program start signal is led out after a fixed time to stop the operation of the oscillating circuit 12. Thus the CPU9 is cancelled for its reset state. When the voltage of the circuit 2 falls down to the 2nd voltage, the discontinuation of the CPU9 is avoided by the flip-flop 6. And immediately the shunting process is carried out by the memory 10 and the printer 11, etc.
COPYRIGHT: (C)1981,JPO&Japio
JP54116967A 1979-09-12 1979-09-12 Power control circuit for electronic equipment Expired JPS5840204B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54116967A JPS5840204B2 (en) 1979-09-12 1979-09-12 Power control circuit for electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54116967A JPS5840204B2 (en) 1979-09-12 1979-09-12 Power control circuit for electronic equipment

Publications (2)

Publication Number Publication Date
JPS5640929A true JPS5640929A (en) 1981-04-17
JPS5840204B2 JPS5840204B2 (en) 1983-09-03

Family

ID=14700177

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54116967A Expired JPS5840204B2 (en) 1979-09-12 1979-09-12 Power control circuit for electronic equipment

Country Status (1)

Country Link
JP (1) JPS5840204B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58129521A (en) * 1982-01-28 1983-08-02 Matsushita Electric Ind Co Ltd Microcomputer device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58129521A (en) * 1982-01-28 1983-08-02 Matsushita Electric Ind Co Ltd Microcomputer device

Also Published As

Publication number Publication date
JPS5840204B2 (en) 1983-09-03

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