JPS5644973A - Video signal processing system - Google Patents

Video signal processing system

Info

Publication number
JPS5644973A
JPS5644973A JP11941679A JP11941679A JPS5644973A JP S5644973 A JPS5644973 A JP S5644973A JP 11941679 A JP11941679 A JP 11941679A JP 11941679 A JP11941679 A JP 11941679A JP S5644973 A JPS5644973 A JP S5644973A
Authority
JP
Japan
Prior art keywords
image sensors
stored
output
video
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11941679A
Other languages
Japanese (ja)
Inventor
Tetsuzo Tanimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11941679A priority Critical patent/JPS5644973A/en
Publication of JPS5644973A publication Critical patent/JPS5644973A/en
Pending legal-status Critical Current

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  • Image Input (AREA)

Abstract

PURPOSE: To simplify the processing circuit by sharing the A/D converting circuit, in the system where the video signal obtained from image sensors of plural channels is converted to a digital signal and is transferred and stored into a memory circuit.
CONSTITUTION: Output of image sensors 11W1n which output video singals for every picture element at the same timing dependent upon clock control circuit 2 are selected by analogue switches 31W3n individually and are applied to common A/D converter 5. These A/D-converted digital signals are stored in memory circuits 61W 6n for every channel. All channel components of video information from respective image sensors are output for every one picture element while switching analogue switches 31W3n successively, and digital video signals subjected to A/D conversion in 5 are stored successively in prescribed memory circuits corresponding to image sensors.
COPYRIGHT: (C)1981,JPO&Japio
JP11941679A 1979-09-19 1979-09-19 Video signal processing system Pending JPS5644973A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11941679A JPS5644973A (en) 1979-09-19 1979-09-19 Video signal processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11941679A JPS5644973A (en) 1979-09-19 1979-09-19 Video signal processing system

Publications (1)

Publication Number Publication Date
JPS5644973A true JPS5644973A (en) 1981-04-24

Family

ID=14760919

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11941679A Pending JPS5644973A (en) 1979-09-19 1979-09-19 Video signal processing system

Country Status (1)

Country Link
JP (1) JPS5644973A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5887666A (en) * 1981-11-19 1983-05-25 Matsushita Electric Ind Co Ltd image input device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4832441A (en) * 1971-08-27 1973-04-28

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4832441A (en) * 1971-08-27 1973-04-28

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5887666A (en) * 1981-11-19 1983-05-25 Matsushita Electric Ind Co Ltd image input device

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