JPS5645076A - Manufacturing of power mis field effect semiconductor device - Google Patents

Manufacturing of power mis field effect semiconductor device

Info

Publication number
JPS5645076A
JPS5645076A JP12064779A JP12064779A JPS5645076A JP S5645076 A JPS5645076 A JP S5645076A JP 12064779 A JP12064779 A JP 12064779A JP 12064779 A JP12064779 A JP 12064779A JP S5645076 A JPS5645076 A JP S5645076A
Authority
JP
Japan
Prior art keywords
membrane
type
gate
region
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12064779A
Other languages
Japanese (ja)
Inventor
Masatomo Furuumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12064779A priority Critical patent/JPS5645076A/en
Publication of JPS5645076A publication Critical patent/JPS5645076A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/603—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To improve production recovery of power MISFET, by forming low- concentration impurity introducing offset sections on a source side and a drain side under a gate insulation membrane, and also by doping phosphorous impurity to a polycrystalline Si gate. CONSTITUTION:By dispersing B on an N type Si substrate 1 using an SiO2 membrane 10 as a mask, a P type well region 2 is formed, and by removing the membrane 10 once and coveringly attaching a gate SiO2 membrane 5, a polycrystalline Si layer 6 is made to grow on the entire surface, and then, P ion is driven therein. And then, by removing unnecessary portion of the layer 6 by photoetching, the layer is allowed to remain as a conductivity-given polycrystalline Si gate 6, and B ion is driven in using this as a mask to form P<-> type regions 7a and 7b which are become offset sections. And then, a P<+> type source regions 3 is dispersedly formed by making it contact the region 7a using a photoresist membrane 11 as a mask, and a P<+> type drain region 4 is also dispersedly formed in a region where the regions 7b and 2 joined together in a body. It is possible, by doing so, to raise Vth.
JP12064779A 1979-09-21 1979-09-21 Manufacturing of power mis field effect semiconductor device Pending JPS5645076A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12064779A JPS5645076A (en) 1979-09-21 1979-09-21 Manufacturing of power mis field effect semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12064779A JPS5645076A (en) 1979-09-21 1979-09-21 Manufacturing of power mis field effect semiconductor device

Publications (1)

Publication Number Publication Date
JPS5645076A true JPS5645076A (en) 1981-04-24

Family

ID=14791392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12064779A Pending JPS5645076A (en) 1979-09-21 1979-09-21 Manufacturing of power mis field effect semiconductor device

Country Status (1)

Country Link
JP (1) JPS5645076A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6091677A (en) * 1983-10-26 1985-05-23 Seiko Epson Corp Mos type transistor
US4946799A (en) * 1988-07-08 1990-08-07 Texas Instruments, Incorporated Process for making high performance silicon-on-insulator transistor with body node to source node connection
US4978628A (en) * 1986-11-19 1990-12-18 Teledyne Industries, Inc. Drail-well/extension high voltage MOS transistor structure and method of fabrication
US5215936A (en) * 1986-10-09 1993-06-01 Kabushiki Kaisha Toshiba Method of fabricating a semiconductor device having a lightly-doped drain structure
US5306658A (en) * 1993-05-27 1994-04-26 Texas Instruments Incorporated Method of making virtual ground memory cell array
US5384278A (en) * 1992-11-16 1995-01-24 United Technologies Corporation Tight control of resistor valves in a SRAM process
WO1996005618A1 (en) * 1994-08-11 1996-02-22 National Semiconductor Corporation High-voltage ldd-mosfet with increased breakdown voltage and method of fabrication
EP0683531A3 (en) * 1994-05-16 1996-02-28 Samsung Electronics Co Ltd MOSFET with an LDD structure and its manufacturing method.
EP0826244A4 (en) * 1995-04-07 1998-05-13 Siliconix Inc Lateral field effect transistor having reduced drain-to-source on-resistance

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6091677A (en) * 1983-10-26 1985-05-23 Seiko Epson Corp Mos type transistor
US5215936A (en) * 1986-10-09 1993-06-01 Kabushiki Kaisha Toshiba Method of fabricating a semiconductor device having a lightly-doped drain structure
US4978628A (en) * 1986-11-19 1990-12-18 Teledyne Industries, Inc. Drail-well/extension high voltage MOS transistor structure and method of fabrication
US4946799A (en) * 1988-07-08 1990-08-07 Texas Instruments, Incorporated Process for making high performance silicon-on-insulator transistor with body node to source node connection
US5384278A (en) * 1992-11-16 1995-01-24 United Technologies Corporation Tight control of resistor valves in a SRAM process
US5306658A (en) * 1993-05-27 1994-04-26 Texas Instruments Incorporated Method of making virtual ground memory cell array
EP0683531A3 (en) * 1994-05-16 1996-02-28 Samsung Electronics Co Ltd MOSFET with an LDD structure and its manufacturing method.
WO1996005618A1 (en) * 1994-08-11 1996-02-22 National Semiconductor Corporation High-voltage ldd-mosfet with increased breakdown voltage and method of fabrication
US5721170A (en) * 1994-08-11 1998-02-24 National Semiconductor Corporation Method of making a high-voltage MOS transistor with increased breakdown voltage
EP0826244A4 (en) * 1995-04-07 1998-05-13 Siliconix Inc Lateral field effect transistor having reduced drain-to-source on-resistance

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