JPS5647148A - Terminal device input circuit of multiplex transmission load controller - Google Patents

Terminal device input circuit of multiplex transmission load controller

Info

Publication number
JPS5647148A
JPS5647148A JP12451079A JP12451079A JPS5647148A JP S5647148 A JPS5647148 A JP S5647148A JP 12451079 A JP12451079 A JP 12451079A JP 12451079 A JP12451079 A JP 12451079A JP S5647148 A JPS5647148 A JP S5647148A
Authority
JP
Japan
Prior art keywords
terminal device
terminal
sent
state
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12451079A
Other languages
Japanese (ja)
Other versions
JPS5927557B2 (en
Inventor
Motoharu Terada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP54124510A priority Critical patent/JPS5927557B2/en
Publication of JPS5647148A publication Critical patent/JPS5647148A/en
Publication of JPS5927557B2 publication Critical patent/JPS5927557B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G08—SIGNALLING
    • G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
    • G08C15/00—Arrangements characterised by the use of multiplexing for the transmission of a plurality of signals over a common path
    • G08C15/06—Arrangements characterised by the use of multiplexing for the transmission of a plurality of signals over a common path successively, i.e. using time division

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)
  • Selective Calling Equipment (AREA)

Abstract

PURPOSE:To increase the speed of response to the state change of a terminal device by transmitting a multiplex transmitted wave cyclically from a central control panel to a terminal circuit and by driving the load of the terminal device by a supervision over the state of the terminal device and control over the terminal device. CONSTITUTION:With switches S1-S3, corresponding capacitors C1-C3 are charged by depressing state setting switches provided to terminal devices. Voltages developed according to the accumulation of charge are led to one terminal of AND gate 9 via the OR gate consisting of diodes D1-D3. At the other input terminal, on the other hand, AND gate 9 is supplied with a sent-back signal that determines sending-back timing to the central control office side. A pulse signal generated right after the sent- back signal is supplied to the base of transistor TR to discharge charged capacitors right after the signal is sent back. Threfore, the speed of response to a change in state improves.
JP54124510A 1979-09-26 1979-09-26 Terminal input circuit for multiple transmission load control equipment Expired JPS5927557B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54124510A JPS5927557B2 (en) 1979-09-26 1979-09-26 Terminal input circuit for multiple transmission load control equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54124510A JPS5927557B2 (en) 1979-09-26 1979-09-26 Terminal input circuit for multiple transmission load control equipment

Publications (2)

Publication Number Publication Date
JPS5647148A true JPS5647148A (en) 1981-04-28
JPS5927557B2 JPS5927557B2 (en) 1984-07-06

Family

ID=14887263

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54124510A Expired JPS5927557B2 (en) 1979-09-26 1979-09-26 Terminal input circuit for multiple transmission load control equipment

Country Status (1)

Country Link
JP (1) JPS5927557B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57193147A (en) * 1981-05-22 1982-11-27 Matsushita Electric Works Ltd Transmission system for time division multiplex signal
US4542109A (en) * 1983-08-09 1985-09-17 Gte Laboratories Incorporated Silicon nitride-cordierite ceramic article, and process of manufacture thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57193147A (en) * 1981-05-22 1982-11-27 Matsushita Electric Works Ltd Transmission system for time division multiplex signal
US4542109A (en) * 1983-08-09 1985-09-17 Gte Laboratories Incorporated Silicon nitride-cordierite ceramic article, and process of manufacture thereof
JPS60502053A (en) * 1983-08-09 1985-11-28 ジ−テイ−イ−　ラボラトリズ　インコ−ポレイテツド Silicon nitride-cordierite ceramic article and method for manufacturing the same

Also Published As

Publication number Publication date
JPS5927557B2 (en) 1984-07-06

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