JPS5648142A - Adherence of semiconductor pellet - Google Patents

Adherence of semiconductor pellet

Info

Publication number
JPS5648142A
JPS5648142A JP12515879A JP12515879A JPS5648142A JP S5648142 A JPS5648142 A JP S5648142A JP 12515879 A JP12515879 A JP 12515879A JP 12515879 A JP12515879 A JP 12515879A JP S5648142 A JPS5648142 A JP S5648142A
Authority
JP
Japan
Prior art keywords
wafer
solder
semiconductor wafer
backing electrode
scribing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12515879A
Other languages
Japanese (ja)
Inventor
Takashi Emura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP12515879A priority Critical patent/JPS5648142A/en
Publication of JPS5648142A publication Critical patent/JPS5648142A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors
    • H10W72/01308—Manufacture or treatment of die-attach connectors using permanent auxiliary members, e.g. using alignment marks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors
    • H10W72/01331—Manufacture or treatment of die-attach connectors using blanket deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07311—Treating the bonding area before connecting, e.g. by applying flux or cleaning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H10W72/07336—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/381—Auxiliary members
    • H10W72/387—Flow barriers

Landscapes

  • Die Bonding (AREA)
  • Dicing (AREA)

Abstract

PURPOSE:To attempt the improvement of reliability by making broad and shallow grooves on the scribe line of a semiconductor wafer from the inside of the wafer wherein a backing electrode is provided and the semiconductor wafer is soldered by using the backing electrode after scribing the semiconductor wafer from the surface. CONSTITUTION:Shallow grooves 12 are made by dicing with a broad blade from the indide of a wafer 11. Next, a Cr-Au-Cr backing electrode 13 is evaporated to split the wafer into a pellet 14 by scribing the wafer from the surface. Next, thermo compression is applied to a header 15 through solder. In this composition, the thickness of solder will be controlled. Thick layer of the solder relieves thermal distortion and the speed of soldering oxide fatigue will be improved.
JP12515879A 1979-09-27 1979-09-27 Adherence of semiconductor pellet Pending JPS5648142A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12515879A JPS5648142A (en) 1979-09-27 1979-09-27 Adherence of semiconductor pellet

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12515879A JPS5648142A (en) 1979-09-27 1979-09-27 Adherence of semiconductor pellet

Publications (1)

Publication Number Publication Date
JPS5648142A true JPS5648142A (en) 1981-05-01

Family

ID=14903305

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12515879A Pending JPS5648142A (en) 1979-09-27 1979-09-27 Adherence of semiconductor pellet

Country Status (1)

Country Link
JP (1) JPS5648142A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009253025A (en) * 2008-04-07 2009-10-29 Toyota Central R&D Labs Inc Module formed by bonding semiconductor device to substrate by metal layer
WO2014185010A1 (en) * 2013-05-13 2014-11-20 パナソニックＩｐマネジメント株式会社 Semiconductor element, semiconductor element manufacturing method, semiconductor module, semiconductor module manufacturing method, and semiconductor package
US10249672B2 (en) 2012-05-30 2019-04-02 Olympus Corporation Image pickup apparatus, semiconductor apparatus, and image pickup unit
JP2020194959A (en) * 2019-05-23 2020-12-03 ローム株式会社 Semiconductor device
JP2023179261A (en) * 2022-06-07 2023-12-19 株式会社デンソー Manufacturing method of semiconductor device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009253025A (en) * 2008-04-07 2009-10-29 Toyota Central R&D Labs Inc Module formed by bonding semiconductor device to substrate by metal layer
US10249672B2 (en) 2012-05-30 2019-04-02 Olympus Corporation Image pickup apparatus, semiconductor apparatus, and image pickup unit
WO2014185010A1 (en) * 2013-05-13 2014-11-20 パナソニックＩｐマネジメント株式会社 Semiconductor element, semiconductor element manufacturing method, semiconductor module, semiconductor module manufacturing method, and semiconductor package
US9362366B2 (en) 2013-05-13 2016-06-07 Panasonic Intellectual Property Management Co., Ltd. Semiconductor element, semiconductor element manufacturing method, semiconductor module, semiconductor module manufacturing method, and semiconductor package
JP5942212B2 (en) * 2013-05-13 2016-06-29 パナソニックＩｐマネジメント株式会社 Semiconductor device and manufacturing method thereof, semiconductor module and manufacturing method thereof, and semiconductor package
JP2020194959A (en) * 2019-05-23 2020-12-03 ローム株式会社 Semiconductor device
JP2023179261A (en) * 2022-06-07 2023-12-19 株式会社デンソー Manufacturing method of semiconductor device

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