JPS5651072A - Logic circuit - Google Patents
Logic circuitInfo
- Publication number
- JPS5651072A JPS5651072A JP12538679A JP12538679A JPS5651072A JP S5651072 A JPS5651072 A JP S5651072A JP 12538679 A JP12538679 A JP 12538679A JP 12538679 A JP12538679 A JP 12538679A JP S5651072 A JPS5651072 A JP S5651072A
- Authority
- JP
- Japan
- Prior art keywords
- collector
- mtr10
- mtr
- base
- gnd
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 101100514837 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) MTR10 gene Proteins 0.000 abstract 3
- 239000006185 dispersion Substances 0.000 abstract 2
- 238000001514 detection method Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/06—Address interface arrangements, e.g. address buffers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Static Random-Access Memory (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To obtain a logic circuit with less dispersion of output of MTR, by providing a voltage clamp means between the base or collector and power supply terminal, to a multi-emitter transistor MTR. CONSTITUTION:The collector of an MTR10 is connected to a ground point GND of the circuit via a series connection of resistors R1, R2 constituting a current detection circuit, the base is connected to the connection point of the resistors R1, R2 and the GND via a clamp diode D1, and the base of a bipolar transistor TR11 is connected to the collector of the MTR10, and the collector of TR11 is connected to the GND. The emitters of the MTR10 are provided with lines 20-22, 20'-22' receiving the noninverting and inverting outputs of three buffer circuits B, for example, and the circuits B are connected to lines 20, 21', 22', for example, depending on the content of code. Further, the word line W connected to the memory cell m is connected to the emitter of TR11. Thus, the dispersion in MTR can be reduced.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12538679A JPS5651072A (en) | 1979-10-01 | 1979-10-01 | Logic circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12538679A JPS5651072A (en) | 1979-10-01 | 1979-10-01 | Logic circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5651072A true JPS5651072A (en) | 1981-05-08 |
| JPS6223394B2 JPS6223394B2 (en) | 1987-05-22 |
Family
ID=14908845
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12538679A Granted JPS5651072A (en) | 1979-10-01 | 1979-10-01 | Logic circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5651072A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59129669A (en) * | 1983-01-14 | 1984-07-26 | Mitsubishi Norton Kk | Inner peripheral edge diamond grindstone |
| JPS6294264A (en) * | 1985-10-18 | 1987-04-30 | Mitsubishi Metal Corp | Inner periphery grindstone |
-
1979
- 1979-10-01 JP JP12538679A patent/JPS5651072A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59129669A (en) * | 1983-01-14 | 1984-07-26 | Mitsubishi Norton Kk | Inner peripheral edge diamond grindstone |
| JPS6294264A (en) * | 1985-10-18 | 1987-04-30 | Mitsubishi Metal Corp | Inner periphery grindstone |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6223394B2 (en) | 1987-05-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0360333A3 (en) | Temperature threshold sensing circuit | |
| JPS5538016A (en) | Semiconductor memory device | |
| HK73093A (en) | Bandgap reference circuit | |
| JPS5553924A (en) | Semiconductor logic circuit | |
| GB1211389A (en) | Logic circuits | |
| JPS5651072A (en) | Logic circuit | |
| GB1259132A (en) | ||
| JPS5696531A (en) | Ttl circuit of open collector | |
| GB1268330A (en) | Improvements in or relating to logic-signal level-converter circuit arrangements | |
| JPS54151360A (en) | Schmitt trigger circuit | |
| JPS5792909A (en) | Power amplifying circuit | |
| GB1465036A (en) | Amplifier circuit | |
| JPS55134539A (en) | Logic level converting circuit | |
| JPS6439119A (en) | Logical operation circuit | |
| JPS5744305A (en) | Transistor circuit | |
| JPS56168243A (en) | Constant-voltage circuit | |
| JPS55153016A (en) | Bias circuit | |
| JPS5760709A (en) | Bias system for amplifying circuit | |
| JPS55107312A (en) | Current mirror circuit | |
| JPS57143907A (en) | Differential amplifier | |
| EP0340725A3 (en) | Ecl-ttl level converting circuit | |
| JPS561769A (en) | Constant current circuit | |
| JPS5656036A (en) | Pulse driving circuit | |
| JPS5694577A (en) | Semiconductor storage device | |
| JPS5657120A (en) | Stabilized power supply circuit |