JPS5654457A - Electrostatic recording device - Google Patents

Electrostatic recording device

Info

Publication number
JPS5654457A
JPS5654457A JP13001979A JP13001979A JPS5654457A JP S5654457 A JPS5654457 A JP S5654457A JP 13001979 A JP13001979 A JP 13001979A JP 13001979 A JP13001979 A JP 13001979A JP S5654457 A JPS5654457 A JP S5654457A
Authority
JP
Japan
Prior art keywords
frequency
register
divided
signal
recording
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13001979A
Other languages
Japanese (ja)
Inventor
Hideo Hirane
Mitsuharu Tadauchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13001979A priority Critical patent/JPS5654457A/en
Publication of JPS5654457A publication Critical patent/JPS5654457A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrophotography Using Other Than Carlson'S Method (AREA)
  • Fax Reproducing Arrangements (AREA)
  • Dot-Matrix Printers And Others (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)

Abstract

PURPOSE:To reduce uneven density under low humidity without increasing one scanning line recording time, by dividing recording styli in one block into 2 groups, and applying recording voltage to each of them at a time different from each other. CONSTITUTION:An image signal is delivered to shift register 10 with clock pulses and their 1/m frequency divided signal. Delivery to register 10 and register 20 are made alternately at every m bits. Gates circuts 51-56 control when to output said signal, using a frequency divided signal of 2/m in counter 4. Recording style in one block are equally divided, and half of the output gates of the shift register corresponding to each of the groups are controlled in a 2/m reversed frequency divided timing, and the other half controlled in a 2/m reversed frequency divided timing. Drive of a control electrode is carried out with register 30 acting with shift pulses in a frequency of 1/m divided frequency in counter 4, thus permitting uneven density under low humidity to be reduced.
JP13001979A 1979-10-11 1979-10-11 Electrostatic recording device Pending JPS5654457A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13001979A JPS5654457A (en) 1979-10-11 1979-10-11 Electrostatic recording device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13001979A JPS5654457A (en) 1979-10-11 1979-10-11 Electrostatic recording device

Publications (1)

Publication Number Publication Date
JPS5654457A true JPS5654457A (en) 1981-05-14

Family

ID=15024145

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13001979A Pending JPS5654457A (en) 1979-10-11 1979-10-11 Electrostatic recording device

Country Status (1)

Country Link
JP (1) JPS5654457A (en)

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