JPS5654679A - Memory area display system for memory - Google Patents

Memory area display system for memory

Info

Publication number
JPS5654679A
JPS5654679A JP13118179A JP13118179A JPS5654679A JP S5654679 A JPS5654679 A JP S5654679A JP 13118179 A JP13118179 A JP 13118179A JP 13118179 A JP13118179 A JP 13118179A JP S5654679 A JPS5654679 A JP S5654679A
Authority
JP
Japan
Prior art keywords
memory
register
address
cpu14
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13118179A
Other languages
Japanese (ja)
Other versions
JPS6021437B2 (en
Inventor
Harumi Nakano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP54131181A priority Critical patent/JPS6021437B2/en
Publication of JPS5654679A publication Critical patent/JPS5654679A/en
Publication of JPS6021437B2 publication Critical patent/JPS6021437B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Input From Keyboards Or The Like (AREA)

Abstract

PURPOSE:To facilitate an easy confirmation of the working condition in the using region of the memory and then ensure a high-efficiency operation for the data input to the residual region, by displaying in pattern the working condition on every block of the memory cassette in an electronic computer and the like. CONSTITUTION:The head address of the memory 15, the head address in the idle region of the memory 15 and the final address of the memory 15 are stored in the register D in the CPU14, the register A in the CPU14 and the register B in the CPU14 respectively. Then with operation of the specified program setting key, the length of the key code is converted into the address number to be stored in the register C in the CPU14. Then the address numbers are added together between the registers A and C, and the result of the addition is stored in the register A. And the addition of the address numbers is compared with the final address of the register B. And if the residual region exists in the memory 15, the key code is written into the memory 15. Then the whole memory region of the memory 15 is displayed at the display part 22 with every block and in a frame pattern.
JP54131181A 1979-10-11 1979-10-11 Memory storage area display method Expired JPS6021437B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54131181A JPS6021437B2 (en) 1979-10-11 1979-10-11 Memory storage area display method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54131181A JPS6021437B2 (en) 1979-10-11 1979-10-11 Memory storage area display method

Publications (2)

Publication Number Publication Date
JPS5654679A true JPS5654679A (en) 1981-05-14
JPS6021437B2 JPS6021437B2 (en) 1985-05-27

Family

ID=15051898

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54131181A Expired JPS6021437B2 (en) 1979-10-11 1979-10-11 Memory storage area display method

Country Status (1)

Country Link
JP (1) JPS6021437B2 (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59177098U (en) * 1983-05-13 1984-11-27 オムロン株式会社 PROM writer
JPS60152296U (en) * 1984-03-21 1985-10-09 日本精機株式会社 lighting equipment
JPS6159925A (en) * 1984-08-30 1986-03-27 Matsushita Electric Ind Co Ltd Individual selective call receiver
JPS6159924A (en) * 1984-08-30 1986-03-27 Matsushita Electric Ind Co Ltd Individual selective calling receiver
JPS61272849A (en) * 1985-05-29 1986-12-03 Canon Inc information processing equipment
JPS6270396U (en) * 1985-10-22 1987-05-02
JPH07129296A (en) * 1994-02-07 1995-05-19 Canon Inc Information processing equipment

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59177098U (en) * 1983-05-13 1984-11-27 オムロン株式会社 PROM writer
JPS60152296U (en) * 1984-03-21 1985-10-09 日本精機株式会社 lighting equipment
JPS6159925A (en) * 1984-08-30 1986-03-27 Matsushita Electric Ind Co Ltd Individual selective call receiver
JPS6159924A (en) * 1984-08-30 1986-03-27 Matsushita Electric Ind Co Ltd Individual selective calling receiver
JPS61272849A (en) * 1985-05-29 1986-12-03 Canon Inc information processing equipment
JPS6270396U (en) * 1985-10-22 1987-05-02
JPH07129296A (en) * 1994-02-07 1995-05-19 Canon Inc Information processing equipment

Also Published As

Publication number Publication date
JPS6021437B2 (en) 1985-05-27

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