JPS5657104A - Dam various quantity processor - Google Patents

Dam various quantity processor

Info

Publication number
JPS5657104A
JPS5657104A JP13296979A JP13296979A JPS5657104A JP S5657104 A JPS5657104 A JP S5657104A JP 13296979 A JP13296979 A JP 13296979A JP 13296979 A JP13296979 A JP 13296979A JP S5657104 A JPS5657104 A JP S5657104A
Authority
JP
Japan
Prior art keywords
timer circuit
module
timer
processor
automatically
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13296979A
Other languages
Japanese (ja)
Inventor
Hiroshi Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13296979A priority Critical patent/JPS5657104A/en
Publication of JPS5657104A publication Critical patent/JPS5657104A/en
Pending legal-status Critical Current

Links

Landscapes

  • Hardware Redundancy (AREA)
  • Feedback Control In General (AREA)
  • Safety Devices In Control Systems (AREA)

Abstract

PURPOSE: To improve reliability in the dam various quantiy processor of the function distributed multimicrocomputer system, by providing timer circuits in plural processing modules to back up them automatically.
CONSTITUTION: Timer circuit 18 is provided in processing module 12, and timer circuit 19 for backup is provided in processing module 13 also. Timer registers 18 in respective modules are normally updated by the time signal from timer circuit 18 incorporated in module 12. When module 12 becomes faulty, timer circuit 18 is switched to timer circuit 19 in module 13 automatically, and time registers 18 in respective modules are updated by the time signal from timer circuit 19 after that. Thus, since the system is not stopped even if module 12 is faulty, reliability of the processor can be improved.
COPYRIGHT: (C)1981,JPO&Japio
JP13296979A 1979-10-17 1979-10-17 Dam various quantity processor Pending JPS5657104A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13296979A JPS5657104A (en) 1979-10-17 1979-10-17 Dam various quantity processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13296979A JPS5657104A (en) 1979-10-17 1979-10-17 Dam various quantity processor

Publications (1)

Publication Number Publication Date
JPS5657104A true JPS5657104A (en) 1981-05-19

Family

ID=15093725

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13296979A Pending JPS5657104A (en) 1979-10-17 1979-10-17 Dam various quantity processor

Country Status (1)

Country Link
JP (1) JPS5657104A (en)

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