JPS5658330A - Output buffer circuit - Google Patents
Output buffer circuitInfo
- Publication number
- JPS5658330A JPS5658330A JP13537979A JP13537979A JPS5658330A JP S5658330 A JPS5658330 A JP S5658330A JP 13537979 A JP13537979 A JP 13537979A JP 13537979 A JP13537979 A JP 13537979A JP S5658330 A JPS5658330 A JP S5658330A
- Authority
- JP
- Japan
- Prior art keywords
- push
- buffer
- power supply
- gates
- sufficiently
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000872 buffer Substances 0.000 title abstract 4
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/09425—Multistate logic
- H03K19/09429—Multistate logic one of the states being the high impedance or floating state
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To minimize the leakage at high impedance, by setting ''0'' level potential sufficiently lower, through the control of the power supply voltage itself for E (enhancement)/D (depression) type gates, driving buffers. CONSTITUTION:For the drive of a buffer 1 of totem pole type consisting of E type MOSFETs T1, T2, a push-pull circuit of E/D gates 2, 3 is used. By controlling the impedance of the power supply voltage side MOSFETs 4-7 of this push-pull circuit, a voltage with sufficiently small level at high impedance is given to the gate of FETs T1, T2. Thus, the leakage current of the buffer 1 can sufficiently be reduced.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13537979A JPS5658330A (en) | 1979-10-19 | 1979-10-19 | Output buffer circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13537979A JPS5658330A (en) | 1979-10-19 | 1979-10-19 | Output buffer circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5658330A true JPS5658330A (en) | 1981-05-21 |
Family
ID=15150327
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13537979A Pending JPS5658330A (en) | 1979-10-19 | 1979-10-19 | Output buffer circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5658330A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004104754A (en) * | 2002-07-15 | 2004-04-02 | Renesas Technology Corp | Semiconductor device |
-
1979
- 1979-10-19 JP JP13537979A patent/JPS5658330A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004104754A (en) * | 2002-07-15 | 2004-04-02 | Renesas Technology Corp | Semiconductor device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6436119A (en) | Load and time compatible current supply driving circuit | |
| EP0130082A3 (en) | Logic and amplifier cells | |
| GB2362043A (en) | Self oscillating power converter circuit | |
| JPS6471324A (en) | Symmetrical amplifier load circuit and amplifier equipped with the load circuit | |
| KR900001815B1 (en) | Driver circuit for a three-state gate array using low driving current | |
| JPS5658330A (en) | Output buffer circuit | |
| JPS6449423A (en) | Complementary metal- oxide-semiconductor circuit | |
| EP0181613A3 (en) | Improved power amplifier circuit | |
| JPS57181231A (en) | Semiconductor integrated circuit | |
| DE3876350D1 (en) | TELEVISION RECEIVER WITH STANDBY OPERATION CONTROL CIRCUIT. | |
| JPS641323A (en) | Switching regulator | |
| JPS55121705A (en) | Oscillation/division circuit | |
| JPS57192113A (en) | Pulse width modulation amplifying circuit | |
| JPS5587470A (en) | Substrate bias circuit of mos integrated circuit | |
| JPS55120215A (en) | Control circuit for continuous resistance of field effect transistor | |
| JPS5539477A (en) | Low power consumption crystal oscillation circuit | |
| JPS6442912A (en) | Switching circuit by field effect transistor | |
| JPS57115007A (en) | Output buffer circuit | |
| JPS55132069A (en) | Ccd driving gear | |
| JPS5543657A (en) | Variable voltage output circuit | |
| JPS5448146A (en) | Amplifying device | |
| JPS5746534A (en) | Waveform shaping circuit | |
| JPS54109363A (en) | Gate circuit | |
| JPS56140708A (en) | Power supply voltage control type amplifier | |
| JPS5686531A (en) | Driving circuit |