JPS5658346A - Timing pickup circuit - Google Patents

Timing pickup circuit

Info

Publication number
JPS5658346A
JPS5658346A JP13484979A JP13484979A JPS5658346A JP S5658346 A JPS5658346 A JP S5658346A JP 13484979 A JP13484979 A JP 13484979A JP 13484979 A JP13484979 A JP 13484979A JP S5658346 A JPS5658346 A JP S5658346A
Authority
JP
Japan
Prior art keywords
pickup circuit
frequency components
different frequency
timing signal
timing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13484979A
Other languages
Japanese (ja)
Inventor
Toru Koyama
Masaru Yamaguchi
Fumio Akashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP13484979A priority Critical patent/JPS5658346A/en
Publication of JPS5658346A publication Critical patent/JPS5658346A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To prevent the disappearance of a timing signal due to the increase in the distortion of an input signal, by picking up the same clock component from different frequency components. CONSTITUTION:The output of nonlinear circuits 3, 4 in which the same block component is picked up from different frequency components is added at an addition circuit 5 to obtain a timing signal via a narrow band pass filter 6.
JP13484979A 1979-10-18 1979-10-18 Timing pickup circuit Pending JPS5658346A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13484979A JPS5658346A (en) 1979-10-18 1979-10-18 Timing pickup circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13484979A JPS5658346A (en) 1979-10-18 1979-10-18 Timing pickup circuit

Publications (1)

Publication Number Publication Date
JPS5658346A true JPS5658346A (en) 1981-05-21

Family

ID=15137900

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13484979A Pending JPS5658346A (en) 1979-10-18 1979-10-18 Timing pickup circuit

Country Status (1)

Country Link
JP (1) JPS5658346A (en)

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