JPS567145A - Microprogram controller - Google Patents

Abstract

PURPOSE: To improve greatly the waste of the physical step number, by storing the arithmetic result of the contents of both the microorder address register MAR and the auxiliary address register into the MAR in case the branch condition is not satisfied for the branch microorder.

CONSTITUTION: When FF7 is "on" along with conditional branch designation signal K of "1" and branch satisfaction signal d of "0" each, mode switch signal m turns to "1". Thus output f of arithmetic circuit 11 is obtained as the result of the operation (such as addition) which is carried out between contents A (for example, value N) of microorder address register MAR1 and contents B (for example, value t) of auxiliary address register 9 each. And this arithmetic result is stored into MAR1. In other words, if the value of register 10 is 0 ("A+B" designation), the branch is realize finally to the address "N+t". In other words, the branch is possible in the optional two directions along with branch destination address e and depending on value t which is set previously to register 9 (under the conditions that signal d is "1" although FF7 is "off" or "on").

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