JPS5674924A - Method of manufacturing semiconductor element - Google Patents
Method of manufacturing semiconductor elementInfo
- Publication number
- JPS5674924A JPS5674924A JP15212279A JP15212279A JPS5674924A JP S5674924 A JPS5674924 A JP S5674924A JP 15212279 A JP15212279 A JP 15212279A JP 15212279 A JP15212279 A JP 15212279A JP S5674924 A JPS5674924 A JP S5674924A
- Authority
- JP
- Japan
- Prior art keywords
- impurity
- diffusion
- concentration
- semiconductor substrate
- film thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
- H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
- H10P32/141—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer comprising oxides only
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
- H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
Landscapes
- Formation Of Insulating Films (AREA)
Abstract
PURPOSE:To provide a high concentration layer to a substrate having a large diameter effectively by applying a liquid solution including a dopant for a semiconductor substrate to a desired thickness directly, heating it and preparing a diffusion layer. CONSTITUTION:An impure undiluted solution is dropped onto a semiconductor substrate and coats it while rotating. An impurity concentration in a coating film and film thickness for forming are prescribed. Then, when these plates are separately arranged from one another and performed the heat diffusion in a heating furnace, the seat resistance thereof becomes uniform. In this case, the undiluted solution of impurity is controlled to within a range of 16-49.5wt% of the concentration and of 0.7-1.5mu of a film thickness of rotation coating with an alcohol solution including P2O5. As the result of this method, the variation of a sheet resistance is decreased and the diffusion of the impurity can be performed with good controlling.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15212279A JPS5674924A (en) | 1979-11-26 | 1979-11-26 | Method of manufacturing semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15212279A JPS5674924A (en) | 1979-11-26 | 1979-11-26 | Method of manufacturing semiconductor element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5674924A true JPS5674924A (en) | 1981-06-20 |
Family
ID=15533535
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15212279A Pending JPS5674924A (en) | 1979-11-26 | 1979-11-26 | Method of manufacturing semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5674924A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6092611A (en) * | 1983-10-26 | 1985-05-24 | Rohm Co Ltd | Diffusing method of impurity of semiconductor element |
| JPS6092610A (en) * | 1983-10-26 | 1985-05-24 | Rohm Co Ltd | Control method of quantity of boron diffused |
-
1979
- 1979-11-26 JP JP15212279A patent/JPS5674924A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6092611A (en) * | 1983-10-26 | 1985-05-24 | Rohm Co Ltd | Diffusing method of impurity of semiconductor element |
| JPS6092610A (en) * | 1983-10-26 | 1985-05-24 | Rohm Co Ltd | Control method of quantity of boron diffused |
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