JPS568872A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS568872A
JPS568872A JP8359079A JP8359079A JPS568872A JP S568872 A JPS568872 A JP S568872A JP 8359079 A JP8359079 A JP 8359079A JP 8359079 A JP8359079 A JP 8359079A JP S568872 A JPS568872 A JP S568872A
Authority
JP
Japan
Prior art keywords
emitter
area
layer
collector
directly under
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8359079A
Other languages
Japanese (ja)
Inventor
Yoshihiko Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8359079A priority Critical patent/JPS568872A/en
Publication of JPS568872A publication Critical patent/JPS568872A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/30Devices controlled by electric currents or voltages
    • H10D48/32Devices controlled by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H10D48/34Bipolar devices
    • H10D48/345Bipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions

Landscapes

  • Bipolar Transistors (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To contrive a reduction in capacity while satisfying an unsaturated condition by specially heightening the impurity concentration of the collector region situated directly under an emitter. CONSTITUTION:An N<+> buried layer 7 is made in a P<-> substrate 9 and a P base 8 is made by stacking an N<-> epitaxial layer 10 and by separating by a P<+> layer 6. With N layers 4, 5 made by forming resist patterns 15 and by implanting ion from windows 13, 14, the concentration of a collector region 4' situated directly under an emitter and that of a region 5' situated directly under a collector lead port become higher than that of the N<-> epitaxial layer 10. An emitter 2 and a lead layer 3 are made by eliminating resists 15 and by N<+> diffusion for the windows 13, 14. Then, an oxide film 1' is opened to open windows at a base lead port 12 and a Schottky diode section 11. This structure permits a decrease in collector resistance even through an emitter area is reduced. The area of the Schottky diode will be reduced though the resistance will increase due to a reduction in the area. In this way, capacitance will be decreased by satisfying an unsaturated condition and by reducing the area of all parts of elements, and accordingly, high speed of circuits will be realized.
JP8359079A 1979-07-02 1979-07-02 Semiconductor device Pending JPS568872A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8359079A JPS568872A (en) 1979-07-02 1979-07-02 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8359079A JPS568872A (en) 1979-07-02 1979-07-02 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS568872A true JPS568872A (en) 1981-01-29

Family

ID=13806698

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8359079A Pending JPS568872A (en) 1979-07-02 1979-07-02 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS568872A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4818712A (en) * 1987-10-13 1989-04-04 Northrop Corporation Aluminum liftoff masking process and product

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4945036A (en) * 1972-08-18 1974-04-27
JPS50102271A (en) * 1974-01-09 1975-08-13
JPS5370677A (en) * 1976-12-06 1978-06-23 Fujitsu Ltd Semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4945036A (en) * 1972-08-18 1974-04-27
JPS50102271A (en) * 1974-01-09 1975-08-13
JPS5370677A (en) * 1976-12-06 1978-06-23 Fujitsu Ltd Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4818712A (en) * 1987-10-13 1989-04-04 Northrop Corporation Aluminum liftoff masking process and product

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