JPS5698792A - Serial memory device - Google Patents

Serial memory device

Info

Publication number
JPS5698792A
JPS5698792A JP116180A JP116180A JPS5698792A JP S5698792 A JPS5698792 A JP S5698792A JP 116180 A JP116180 A JP 116180A JP 116180 A JP116180 A JP 116180A JP S5698792 A JPS5698792 A JP S5698792A
Authority
JP
Japan
Prior art keywords
shift
shift register
pulse
matrix
memory cells
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP116180A
Other languages
Japanese (ja)
Inventor
Shigeki Matsue
Yasaburo Inagaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP116180A priority Critical patent/JPS5698792A/en
Publication of JPS5698792A publication Critical patent/JPS5698792A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/04Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Shift Register Type Memory (AREA)

Abstract

PURPOSE:To shorten the access time by excluding required cycles of shift registers with a resetting function, by using the shift registers for a selecting circuit for memory cells arrayed in a matrix. CONSTITUTION:For selecting memory cells 10 arrayed in a matrix of (m) rows by (n) columns, m-bit shift register 50 and n-bit shift register 60 are provided. Both X shift register 50 and Y shift rgister 60, having a resetting function, can shift shift pulses to prescribed positions, e.g. positions 51 and 61 at their heads with a reset clock. When the shift pulse of one shift register has passed by a position to be accessed, the reset clock moves the shift pulse to the head position of the shift register and from this position, the shift pulse is advanced for access, shortening the access time.
JP116180A 1980-01-09 1980-01-09 Serial memory device Pending JPS5698792A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP116180A JPS5698792A (en) 1980-01-09 1980-01-09 Serial memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP116180A JPS5698792A (en) 1980-01-09 1980-01-09 Serial memory device

Publications (1)

Publication Number Publication Date
JPS5698792A true JPS5698792A (en) 1981-08-08

Family

ID=11493705

Family Applications (1)

Application Number Title Priority Date Filing Date
JP116180A Pending JPS5698792A (en) 1980-01-09 1980-01-09 Serial memory device

Country Status (1)

Country Link
JP (1) JPS5698792A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0273591A (en) * 1988-09-08 1990-03-13 Hitachi Ltd Semiconductor memory device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49128644A (en) * 1973-04-09 1974-12-10

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49128644A (en) * 1973-04-09 1974-12-10

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0273591A (en) * 1988-09-08 1990-03-13 Hitachi Ltd Semiconductor memory device

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