JPS5698979A - Still picture broadcast receiver - Google Patents
Still picture broadcast receiverInfo
- Publication number
- JPS5698979A JPS5698979A JP196080A JP196080A JPS5698979A JP S5698979 A JPS5698979 A JP S5698979A JP 196080 A JP196080 A JP 196080A JP 196080 A JP196080 A JP 196080A JP S5698979 A JPS5698979 A JP S5698979A
- Authority
- JP
- Japan
- Prior art keywords
- frame
- still picture
- signal
- clock pulse
- subcarrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/4448—Receiver circuitry for the reception of television signals according to analogue transmission standards for frame-grabbing
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Systems (AREA)
Abstract
PURPOSE:To obtain a still picture easily with simple constitution, by generating a frame pulse, whose subcarrier is shifted by a half cycle in response to every frame pulse obtained from an 8/5 color subcarrier frequency by making use of the frame pulses. CONSTITUTION:Clock pulse generating circuit 1 generates the 1st clock pulse string whose phase synchronizes with a digital control signal, and subcarrier generating circuit 2 generates a clock pulse string greater than the color carrier of an analog still picture signal by odd-number times. Further, video clock pulse generating circuit 5 generates pulses of three-fold fsc and A/D converter 6 converts the still picture signal into a digital signal, which is stored in frame memory 7. Further, frame memory control circuit 4 detects frame pulses synchronizing with 8/5 fsc of reception control circuit 3 to generate frame pulses whose subcarrier is shifted by a half cycle in response to every said frame pulse, and the digitized signal stored in memory 7 is read into D/A converter 8 to output a still picture signal converted into an analog signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP196080A JPS5698979A (en) | 1980-01-10 | 1980-01-10 | Still picture broadcast receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP196080A JPS5698979A (en) | 1980-01-10 | 1980-01-10 | Still picture broadcast receiver |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5698979A true JPS5698979A (en) | 1981-08-08 |
| JPH0214835B2 JPH0214835B2 (en) | 1990-04-10 |
Family
ID=11516151
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP196080A Granted JPS5698979A (en) | 1980-01-10 | 1980-01-10 | Still picture broadcast receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5698979A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50153526A (en) * | 1974-05-28 | 1975-12-10 | ||
| JPS52162813U (en) * | 1976-06-01 | 1977-12-09 |
-
1980
- 1980-01-10 JP JP196080A patent/JPS5698979A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50153526A (en) * | 1974-05-28 | 1975-12-10 | ||
| JPS52162813U (en) * | 1976-06-01 | 1977-12-09 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0214835B2 (en) | 1990-04-10 |
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