JPS57100551A - Computer system - Google Patents

Computer system

Info

Publication number
JPS57100551A
JPS57100551A JP17683280A JP17683280A JPS57100551A JP S57100551 A JPS57100551 A JP S57100551A JP 17683280 A JP17683280 A JP 17683280A JP 17683280 A JP17683280 A JP 17683280A JP S57100551 A JPS57100551 A JP S57100551A
Authority
JP
Japan
Prior art keywords
computer
signal
request
supplied
input device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17683280A
Other languages
Japanese (ja)
Inventor
Shuichi Yamamoto
Shigeru Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP17683280A priority Critical patent/JPS57100551A/en
Publication of JPS57100551A publication Critical patent/JPS57100551A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To make use of the function of a stand alone process computer for a host computer, by using a connetion among the communication circuits. CONSTITUTION:A connection request signal is supplied by means of an input device In of a computer, and this request sent to a master computer Co via a communication connecting device Ln. With this signal, the computer Co recognizes a slave computer Cn as a processor added to the computer. On the other hand, a program is produced under the computer Co through a terminal Tm of the computer Co to request the process function the computer Cn possesses. Thus the computer Cn receives a process request command signal via the device Ln and then carries out a process as if it were supplied the signal through own input device In.
JP17683280A 1980-12-15 1980-12-15 Computer system Pending JPS57100551A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17683280A JPS57100551A (en) 1980-12-15 1980-12-15 Computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17683280A JPS57100551A (en) 1980-12-15 1980-12-15 Computer system

Publications (1)

Publication Number Publication Date
JPS57100551A true JPS57100551A (en) 1982-06-22

Family

ID=16020610

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17683280A Pending JPS57100551A (en) 1980-12-15 1980-12-15 Computer system

Country Status (1)

Country Link
JP (1) JPS57100551A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6063663A (en) * 1983-09-16 1985-04-12 Rojitsuku Syst Internatl Kk Multiterminal system of microcomputer
JPS6186863A (en) * 1984-10-05 1986-05-02 Mitsubishi Electric Corp Control system for multiprocessor system
JPH01234960A (en) * 1988-03-16 1989-09-20 Fuji Xerox Co Ltd Information processing service system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6063663A (en) * 1983-09-16 1985-04-12 Rojitsuku Syst Internatl Kk Multiterminal system of microcomputer
JPS6186863A (en) * 1984-10-05 1986-05-02 Mitsubishi Electric Corp Control system for multiprocessor system
JPH01234960A (en) * 1988-03-16 1989-09-20 Fuji Xerox Co Ltd Information processing service system

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