JPS57103182A - Address generation system - Google Patents

Address generation system

Info

Publication number
JPS57103182A
JPS57103182A JP55180183A JP18018380A JPS57103182A JP S57103182 A JPS57103182 A JP S57103182A JP 55180183 A JP55180183 A JP 55180183A JP 18018380 A JP18018380 A JP 18018380A JP S57103182 A JPS57103182 A JP S57103182A
Authority
JP
Japan
Prior art keywords
contents
order
address
bits
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55180183A
Other languages
Japanese (ja)
Inventor
Yutaka Katsumata
Hideyasu Fukazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Panafacom Ltd
Original Assignee
Fujitsu Ltd
Panafacom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Panafacom Ltd filed Critical Fujitsu Ltd
Priority to JP55180183A priority Critical patent/JPS57103182A/en
Publication of JPS57103182A publication Critical patent/JPS57103182A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To decrease the number of segment registers by using the registers efficiently, by generating an address by combining an offset address with a segment base address or segment number. CONSTITUTION:The contents of a base register specification part B are decoded and the low-order 24 digit bits of the contents of one of general registers GR0- GR15, specified as an offset register, are added AD1 to a displacement part D. The contents of an index register specification part X are decoded, and the low- order 24 digit bits of the contents of one of the general registers GR0-GR15, specified as an index register, are further added AD2 to the result of the addition AD1. The contents of the high-order 8 bits of the general register specified as the offset register are decoded and the low-order 24 bits of the contents of specified one of segment registers SR0-SR3 are added to the high-order 24 bits of an address register AR; and the result of the addition AD2 is transferred as an offset address to the low-order 24 bits, thus generating an address AR.
JP55180183A 1980-12-19 1980-12-19 Address generation system Pending JPS57103182A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55180183A JPS57103182A (en) 1980-12-19 1980-12-19 Address generation system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55180183A JPS57103182A (en) 1980-12-19 1980-12-19 Address generation system

Publications (1)

Publication Number Publication Date
JPS57103182A true JPS57103182A (en) 1982-06-26

Family

ID=16078830

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55180183A Pending JPS57103182A (en) 1980-12-19 1980-12-19 Address generation system

Country Status (1)

Country Link
JP (1) JPS57103182A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58501148A (en) * 1981-06-29 1983-07-14 バロ−ス・コ−ポレ−シヨン address generator
JPS629931B2 (en) * 1982-04-14 1987-03-03 Burroughs Corp

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58501148A (en) * 1981-06-29 1983-07-14 バロ−ス・コ−ポレ−シヨン address generator
JPS629931B2 (en) * 1982-04-14 1987-03-03 Burroughs Corp

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