JPS57109084A - Schedule system for instruction in parallel computer having plural operating devices - Google Patents

Schedule system for instruction in parallel computer having plural operating devices

Info

Publication number
JPS57109084A
JPS57109084A JP55186147A JP18614780A JPS57109084A JP S57109084 A JPS57109084 A JP S57109084A JP 55186147 A JP55186147 A JP 55186147A JP 18614780 A JP18614780 A JP 18614780A JP S57109084 A JPS57109084 A JP S57109084A
Authority
JP
Japan
Prior art keywords
instructions
instruction
units
same
inputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55186147A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6132697B2 (fr
Inventor
Yoshiyuki Tanakura
Yukio Kamiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55186147A priority Critical patent/JPS57109084A/ja
Publication of JPS57109084A publication Critical patent/JPS57109084A/ja
Publication of JPS6132697B2 publication Critical patent/JPS6132697B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
JP55186147A 1980-12-26 1980-12-26 Schedule system for instruction in parallel computer having plural operating devices Granted JPS57109084A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55186147A JPS57109084A (en) 1980-12-26 1980-12-26 Schedule system for instruction in parallel computer having plural operating devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55186147A JPS57109084A (en) 1980-12-26 1980-12-26 Schedule system for instruction in parallel computer having plural operating devices

Publications (2)

Publication Number Publication Date
JPS57109084A true JPS57109084A (en) 1982-07-07
JPS6132697B2 JPS6132697B2 (fr) 1986-07-29

Family

ID=16183195

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55186147A Granted JPS57109084A (en) 1980-12-26 1980-12-26 Schedule system for instruction in parallel computer having plural operating devices

Country Status (1)

Country Link
JP (1) JPS57109084A (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5991546A (ja) * 1982-10-13 1984-05-26 ハネウエル・インフオメ−シヨンシステムズ・インコ−ポレ−テツド 中央処理装置
JPS5991547A (ja) * 1982-10-13 1984-05-26 ハネウエル・インフオメ−シヨン・システムズ・インコ−ポレ−テツド 収集装置
JPS60120472A (ja) * 1983-12-02 1985-06-27 Fujitsu Ltd 多重ル−プのベクトル処理方式
JPS61100862A (ja) * 1984-10-12 1986-05-19 Fujitsu Ltd 命令の逐次化方式

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0561596U (ja) * 1991-11-28 1993-08-13 セイキ工業株式会社 埋設管用保護カバー

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5110746A (fr) * 1974-07-17 1976-01-28 Hitachi Ltd
JPS53108254A (en) * 1977-03-02 1978-09-20 Nec Corp Information processor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5110746A (fr) * 1974-07-17 1976-01-28 Hitachi Ltd
JPS53108254A (en) * 1977-03-02 1978-09-20 Nec Corp Information processor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5991546A (ja) * 1982-10-13 1984-05-26 ハネウエル・インフオメ−シヨンシステムズ・インコ−ポレ−テツド 中央処理装置
JPS5991547A (ja) * 1982-10-13 1984-05-26 ハネウエル・インフオメ−シヨン・システムズ・インコ−ポレ−テツド 収集装置
JPS60120472A (ja) * 1983-12-02 1985-06-27 Fujitsu Ltd 多重ル−プのベクトル処理方式
JPS61100862A (ja) * 1984-10-12 1986-05-19 Fujitsu Ltd 命令の逐次化方式

Also Published As

Publication number Publication date
JPS6132697B2 (fr) 1986-07-29

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