JPS57113105A - Sequence controller - Google Patents

Sequence controller

Info

Publication number
JPS57113105A
JPS57113105A JP18741980A JP18741980A JPS57113105A JP S57113105 A JPS57113105 A JP S57113105A JP 18741980 A JP18741980 A JP 18741980A JP 18741980 A JP18741980 A JP 18741980A JP S57113105 A JPS57113105 A JP S57113105A
Authority
JP
Japan
Prior art keywords
signal
input signal
storage element
terminal
flop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18741980A
Other languages
Japanese (ja)
Inventor
Yuji Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP18741980A priority Critical patent/JPS57113105A/en
Publication of JPS57113105A publication Critical patent/JPS57113105A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Program-control systems
    • G05B19/02—Program-control systems electric
    • G05B19/04—Program control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • G05B19/054—Input/output

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Programmable Controllers (AREA)

Abstract

PURPOSE:To realize simple circuit constitution by using a last readout signal and an optional input signal in combination as a readout address signal for a storage element group. CONSTITUTION:When a signal is inputted to an input terminal 11, operation starts and the output signal of a flip-flop 5 is used as part of an address. The storage contents of a storage element group 2 are used as data for the selection of an input signal, and one input signal is selected. An input signal (b) is passed through a flip-flop 3 and combined with the output signal of a flip-flop 5 while a signal from an input terminal 12 is held in a phase inverting circuit 10, thereby selecting the storage contents of storage element groups 4 and 6. The contents of the storage element group 4 are used as an address for selecting a next input signal, and a multibit input signal inputted from a terminal 8 is selected to send a control output from a terminal 9.
JP18741980A 1980-12-30 1980-12-30 Sequence controller Pending JPS57113105A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18741980A JPS57113105A (en) 1980-12-30 1980-12-30 Sequence controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18741980A JPS57113105A (en) 1980-12-30 1980-12-30 Sequence controller

Publications (1)

Publication Number Publication Date
JPS57113105A true JPS57113105A (en) 1982-07-14

Family

ID=16205707

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18741980A Pending JPS57113105A (en) 1980-12-30 1980-12-30 Sequence controller

Country Status (1)

Country Link
JP (1) JPS57113105A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5379346A (en) * 1976-12-23 1978-07-13 Fuji Electric Co Ltd Logical circuit
JPS5386136A (en) * 1977-01-06 1978-07-29 Nec Corp Control circuit
JPS5559504A (en) * 1978-10-26 1980-05-06 Siemens Ag Programmable control mechanism

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5379346A (en) * 1976-12-23 1978-07-13 Fuji Electric Co Ltd Logical circuit
JPS5386136A (en) * 1977-01-06 1978-07-29 Nec Corp Control circuit
JPS5559504A (en) * 1978-10-26 1980-05-06 Siemens Ag Programmable control mechanism

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